TimeQuest Timing Analyzer report for mux21a2627 Mon Nov 06 09:18:40 2023 Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. TimeQuest Timing Analyzer Summary 3. Parallel Compilation 4. Clocks 5. Slow 1200mV 85C Model Fmax Summary 6. Timing Closure Recommendations 7. Slow 1200mV 85C Model Setup Summary 8. Slow 1200mV 85C Model Hold Summary 9. Slow 1200mV 85C Model Recovery Summary 10. Slow 1200mV 85C Model Removal Summary 11. Slow 1200mV 85C Model Minimum Pulse Width Summary 12. Slow 1200mV 85C Model Setup: 'Timing:inst1|inst3' 13. Slow 1200mV 85C Model Setup: 'Timing:inst1|inst' 14. Slow 1200mV 85C Model Setup: 'Reg8:_IR|16' 15. Slow 1200mV 85C Model Setup: 'Timing:inst1|inst2' 16. Slow 1200mV 85C Model Setup: 'Timing:inst1|inst1' 17. Slow 1200mV 85C Model Setup: 'CLK1' 18. Slow 1200mV 85C Model Hold: 'Timing:inst1|inst3' 19. Slow 1200mV 85C Model Hold: 'Timing:inst1|inst' 20. Slow 1200mV 85C Model Hold: 'CLK1' 21. Slow 1200mV 85C Model Hold: 'Reg8:_IR|16' 22. Slow 1200mV 85C Model Hold: 'Timing:inst1|inst1' 23. Slow 1200mV 85C Model Hold: 'Timing:inst1|inst2' 24. Slow 1200mV 85C Model Recovery: 'Timing:inst1|inst1' 25. Slow 1200mV 85C Model Recovery: 'Timing:inst1|inst3' 26. Slow 1200mV 85C Model Removal: 'Timing:inst1|inst1' 27. Slow 1200mV 85C Model Removal: 'Timing:inst1|inst3' 28. Slow 1200mV 85C Model Metastability Summary 29. Slow 1200mV 0C Model Fmax Summary 30. Slow 1200mV 0C Model Setup Summary 31. Slow 1200mV 0C Model Hold Summary 32. Slow 1200mV 0C Model Recovery Summary 33. Slow 1200mV 0C Model Removal Summary 34. Slow 1200mV 0C Model Minimum Pulse Width Summary 35. Slow 1200mV 0C Model Setup: 'Timing:inst1|inst3' 36. Slow 1200mV 0C Model Setup: 'Timing:inst1|inst' 37. Slow 1200mV 0C Model Setup: 'Reg8:_IR|16' 38. Slow 1200mV 0C Model Setup: 'Timing:inst1|inst2' 39. Slow 1200mV 0C Model Setup: 'Timing:inst1|inst1' 40. Slow 1200mV 0C Model Setup: 'CLK1' 41. Slow 1200mV 0C Model Hold: 'Timing:inst1|inst3' 42. Slow 1200mV 0C Model Hold: 'Timing:inst1|inst' 43. Slow 1200mV 0C Model Hold: 'CLK1' 44. Slow 1200mV 0C Model Hold: 'Reg8:_IR|16' 45. Slow 1200mV 0C Model Hold: 'Timing:inst1|inst1' 46. Slow 1200mV 0C Model Hold: 'Timing:inst1|inst2' 47. Slow 1200mV 0C Model Recovery: 'Timing:inst1|inst1' 48. Slow 1200mV 0C Model Recovery: 'Timing:inst1|inst3' 49. Slow 1200mV 0C Model Removal: 'Timing:inst1|inst1' 50. Slow 1200mV 0C Model Removal: 'Timing:inst1|inst3' 51. Slow 1200mV 0C Model Metastability Summary 52. Fast 1200mV 0C Model Setup Summary 53. Fast 1200mV 0C Model Hold Summary 54. Fast 1200mV 0C Model Recovery Summary 55. Fast 1200mV 0C Model Removal Summary 56. Fast 1200mV 0C Model Minimum Pulse Width Summary 57. Fast 1200mV 0C Model Setup: 'Timing:inst1|inst3' 58. Fast 1200mV 0C Model Setup: 'Timing:inst1|inst' 59. Fast 1200mV 0C Model Setup: 'Reg8:_IR|16' 60. Fast 1200mV 0C Model Setup: 'Timing:inst1|inst2' 61. Fast 1200mV 0C Model Setup: 'Timing:inst1|inst1' 62. Fast 1200mV 0C Model Setup: 'CLK1' 63. Fast 1200mV 0C Model Hold: 'Timing:inst1|inst' 64. Fast 1200mV 0C Model Hold: 'Timing:inst1|inst3' 65. Fast 1200mV 0C Model Hold: 'CLK1' 66. Fast 1200mV 0C Model Hold: 'Reg8:_IR|16' 67. Fast 1200mV 0C Model Hold: 'Timing:inst1|inst1' 68. Fast 1200mV 0C Model Hold: 'Timing:inst1|inst2' 69. Fast 1200mV 0C Model Recovery: 'Timing:inst1|inst1' 70. Fast 1200mV 0C Model Recovery: 'Timing:inst1|inst3' 71. Fast 1200mV 0C Model Removal: 'Timing:inst1|inst1' 72. Fast 1200mV 0C Model Removal: 'Timing:inst1|inst3' 73. Fast 1200mV 0C Model Metastability Summary 74. Multicorner Timing Analysis Summary 75. Board Trace Model Assignments 76. Input Transition Times 77. Signal Integrity Metrics (Slow 1200mv 0c Model) 78. Signal Integrity Metrics (Slow 1200mv 85c Model) 79. Signal Integrity Metrics (Fast 1200mv 0c Model) 80. Setup Transfers 81. Hold Transfers 82. Recovery Transfers 83. Removal Transfers 84. Report TCCS 85. Report RSKM 86. Unconstrained Paths Summary 87. Clock Status Summary 88. Unconstrained Input Ports 89. Unconstrained Output Ports 90. Unconstrained Input Ports 91. Unconstrained Output Ports 92. TimeQuest Timing Analyzer Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 2017 Intel Corporation. All rights reserved. Your use of Intel Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Intel Program License Subscription Agreement, the Intel Quartus Prime License Agreement, the Intel FPGA IP License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Intel and sold by Intel or its authorized distributors. Please refer to the applicable agreement for further details. +-----------------------------------------------------------------------------+ ; TimeQuest Timing Analyzer Summary ; +-----------------------+-----------------------------------------------------+ ; Quartus Prime Version ; Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition ; ; Timing Analyzer ; TimeQuest ; ; Revision Name ; mux21a2627 ; ; Device Family ; Cyclone IV E ; ; Device Name ; EP4CE6F17C6 ; ; Timing Models ; Final ; ; Delay Model ; Combined ; ; Rise/Fall Delays ; Enabled ; +-----------------------+-----------------------------------------------------+ +------------------------------------------+ ; Parallel Compilation ; +----------------------------+-------------+ ; Processors ; Number ; +----------------------------+-------------+ ; Number detected on machine ; 16 ; ; Maximum allowed ; 16 ; ; ; ; ; Average used ; 1.11 ; ; Maximum used ; 16 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; ; Processor 2 ; 2.5% ; ; Processor 3 ; 1.2% ; ; Processor 4 ; 0.9% ; ; Processors 5-16 ; 0.6% ; +----------------------------+-------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clocks ; +--------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+------------------------+ ; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ; +--------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+------------------------+ ; CLK1 ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { CLK1 } ; ; Reg8:_IR|16 ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { Reg8:_IR|16 } ; ; Timing:inst1|inst ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { Timing:inst1|inst } ; ; Timing:inst1|inst1 ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { Timing:inst1|inst1 } ; ; Timing:inst1|inst2 ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { Timing:inst1|inst2 } ; ; Timing:inst1|inst3 ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { Timing:inst1|inst3 } ; +--------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+------------------------+ +----------------------------------------------------------+ ; Slow 1200mV 85C Model Fmax Summary ; +------------+-----------------+--------------------+------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +------------+-----------------+--------------------+------+ ; 62.86 MHz ; 62.86 MHz ; Timing:inst1|inst3 ; ; ; 97.24 MHz ; 97.24 MHz ; Timing:inst1|inst ; ; ; 183.25 MHz ; 183.25 MHz ; Timing:inst1|inst1 ; ; ; 188.39 MHz ; 188.39 MHz ; Timing:inst1|inst2 ; ; ; 277.47 MHz ; 277.47 MHz ; Reg8:_IR|16 ; ; +------------+-----------------+--------------------+------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. ---------------------------------- ; Timing Closure Recommendations ; ---------------------------------- HTML report is unavailable in plain text report export. +----------------------------------------------+ ; Slow 1200mV 85C Model Setup Summary ; +--------------------+---------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+---------+---------------+ ; Timing:inst1|inst3 ; -10.490 ; -278.532 ; ; Timing:inst1|inst ; -9.284 ; -18.198 ; ; Reg8:_IR|16 ; -7.391 ; -129.558 ; ; Timing:inst1|inst2 ; -7.135 ; -138.985 ; ; Timing:inst1|inst1 ; -6.700 ; -31.169 ; ; CLK1 ; -0.900 ; -3.236 ; +--------------------+---------+---------------+ +---------------------------------------------+ ; Slow 1200mV 85C Model Hold Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst3 ; -0.147 ; -0.599 ; ; Timing:inst1|inst ; 0.017 ; 0.000 ; ; CLK1 ; 0.275 ; 0.000 ; ; Reg8:_IR|16 ; 0.935 ; 0.000 ; ; Timing:inst1|inst1 ; 0.945 ; 0.000 ; ; Timing:inst1|inst2 ; 2.029 ; 0.000 ; +--------------------+--------+---------------+ +---------------------------------------------+ ; Slow 1200mV 85C Model Recovery Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst1 ; -8.993 ; -25.857 ; ; Timing:inst1|inst3 ; -2.546 ; -20.368 ; +--------------------+--------+---------------+ +--------------------------------------------+ ; Slow 1200mV 85C Model Removal Summary ; +--------------------+-------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+-------+---------------+ ; Timing:inst1|inst1 ; 0.362 ; 0.000 ; ; Timing:inst1|inst3 ; 0.405 ; 0.000 ; +--------------------+-------+---------------+ +---------------------------------------------------+ ; Slow 1200mV 85C Model Minimum Pulse Width Summary ; +--------------------+--------+---------------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------------+ ; CLK1 ; -3.000 ; -8.000 ; ; Timing:inst1|inst1 ; -2.174 ; -12.522 ; ; Timing:inst1|inst ; -2.174 ; -4.348 ; ; Timing:inst1|inst3 ; -1.000 ; -43.000 ; ; Reg8:_IR|16 ; -1.000 ; -21.000 ; ; Timing:inst1|inst2 ; -1.000 ; -21.000 ; +--------------------+--------+---------------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'Timing:inst1|inst3' ; +---------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +---------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -10.490 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.550 ; 6.792 ; ; -10.031 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.654 ; 7.597 ; ; -10.021 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.757 ; 6.817 ; ; -9.731 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.656 ; 6.938 ; ; -9.553 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.439 ; 7.510 ; ; -9.456 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.919 ; 7.136 ; ; -9.169 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.756 ; 6.893 ; ; -9.160 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.620 ; 6.829 ; ; -8.594 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.220 ; 6.666 ; ; -8.453 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.461 ; 4.844 ; ; -8.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.116 ; 7.636 ; ; -8.051 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.013 ; 6.617 ; ; -8.045 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.114 ; 7.022 ; ; -7.931 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.668 ; 4.816 ; ; -7.695 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.149 ; 7.145 ; ; -7.566 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.562 ; 3.856 ; ; -7.565 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.014 ; 7.059 ; ; -7.503 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.565 ; 5.158 ; ; -7.454 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.774 ; 2.233 ; ; -7.436 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.562 ; 3.726 ; ; -7.420 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.705 ; 3.567 ; ; -7.392 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.666 ; 4.946 ; ; -7.364 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.637 ; 2.280 ; ; -7.350 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.533 ; 3.037 ; ; -7.347 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.483 ; 3.084 ; ; -7.332 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.331 ; 7.059 ; ; -7.316 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.921 ; 3.247 ; ; -7.292 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.921 ; 3.223 ; ; -7.237 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.705 ; 3.384 ; ; -7.224 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.705 ; 3.371 ; ; -7.213 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.150 ; 6.652 ; ; -7.202 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.769 ; 3.986 ; ; -7.184 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.830 ; 4.953 ; ; -7.129 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.670 ; 2.679 ; ; -7.128 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.180 ; 8.303 ; ; -7.102 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.769 ; 3.886 ; ; -7.095 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.567 ; 4.391 ; ; -7.087 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.912 ; 3.728 ; ; -7.084 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.668 ; 4.279 ; ; -7.054 ; Reg8:_R2|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.128 ; 3.479 ; ; -6.983 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.128 ; 3.408 ; ; -6.969 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.531 ; 4.727 ; ; -6.962 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.809 ; 4.373 ; ; -6.939 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.562 ; 3.229 ; ; -6.906 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.702 ; 3.056 ; ; -6.904 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.912 ; 3.545 ; ; -6.893 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.350 ; 4.939 ; ; -6.891 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.912 ; 3.532 ; ; -6.881 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.672 ; 2.072 ; ; -6.871 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.666 ; 4.425 ; ; -6.864 ; Reg8:_R2|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.921 ; 2.795 ; ; -6.856 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.809 ; 4.267 ; ; -6.841 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.809 ; 4.252 ; ; -6.836 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.584 ; 1.805 ; ; -6.823 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.931 ; 4.491 ; ; -6.818 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.128 ; 3.243 ; ; -6.806 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.180 ; 7.981 ; ; -6.796 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.535 ; 2.124 ; ; -6.792 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.799 ; 2.592 ; ; -6.791 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.485 ; 2.169 ; ; -6.781 ; Reg8:_R2|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.921 ; 2.712 ; ; -6.781 ; Reg8:_R1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.702 ; 2.931 ; ; -6.780 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.667 ; 4.593 ; ; -6.726 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.451 ; 4.671 ; ; -6.723 ; Reg8:_R1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.909 ; 3.367 ; ; -6.721 ; Reg8:_R1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.702 ; 2.871 ; ; -6.707 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.585 ; 2.602 ; ; -6.686 ; Reg8:_R1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.909 ; 3.330 ; ; -6.684 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.773 ; 2.391 ; ; -6.662 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.811 ; 3.714 ; ; -6.634 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.451 ; 4.579 ; ; -6.625 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.290 ; 3.934 ; ; -6.619 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.594 ; 4.421 ; ; -6.606 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.769 ; 3.390 ; ; -6.582 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.666 ; 4.136 ; ; -6.572 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.909 ; 3.216 ; ; -6.540 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.180 ; 7.715 ; ; -6.532 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|17 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.180 ; 7.707 ; ; -6.528 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.181 ; 7.704 ; ; -6.523 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.632 ; 4.180 ; ; -6.515 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.810 ; 4.101 ; ; -6.489 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.934 ; 2.154 ; ; -6.486 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.180 ; 7.661 ; ; -6.436 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.594 ; 4.238 ; ; -6.425 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.635 ; 2.270 ; ; -6.423 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.594 ; 4.225 ; ; -6.396 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|15 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.181 ; 7.572 ; ; -6.387 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.074 ; 3.912 ; ; -6.372 ; Reg8:_R1|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.702 ; 2.522 ; ; -6.356 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.768 ; 4.068 ; ; -6.308 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.746 ; 2.161 ; ; -6.296 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.931 ; 3.964 ; ; -6.294 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.310 ; 2.380 ; ; -6.281 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.074 ; 3.806 ; ; -6.250 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.768 ; 3.962 ; ; -6.238 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_LED_OUT|13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.784 ; 8.017 ; ; -6.235 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.911 ; 3.804 ; ; -6.197 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.810 ; 3.783 ; ; -6.194 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.074 ; 3.719 ; ; -6.138 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.451 ; 4.083 ; +---------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'Timing:inst1|inst' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; -9.284 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -1.830 ; 8.482 ; ; -8.914 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -0.132 ; 9.810 ; ; -6.457 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.842 ; 5.643 ; ; -6.365 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.842 ; 5.551 ; ; -6.350 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.985 ; 5.393 ; ; -6.246 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -2.201 ; 5.073 ; ; -6.167 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.985 ; 5.210 ; ; -6.154 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.985 ; 5.197 ; ; -6.138 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -0.060 ; 7.106 ; ; -6.087 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.144 ; 6.971 ; ; -5.995 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.144 ; 6.879 ; ; -5.980 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.287 ; 6.721 ; ; -5.928 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -2.201 ; 4.755 ; ; -5.924 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -2.201 ; 4.751 ; ; -5.920 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; 1.638 ; 8.586 ; ; -5.876 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.503 ; 6.401 ; ; -5.869 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.842 ; 5.055 ; ; -5.835 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.982 ; 4.881 ; ; -5.805 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.982 ; 4.851 ; ; -5.797 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.287 ; 6.538 ; ; -5.784 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.287 ; 6.525 ; ; -5.593 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.982 ; 4.639 ; ; -5.558 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.503 ; 6.083 ; ; -5.554 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.503 ; 6.079 ; ; -5.499 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.144 ; 6.383 ; ; -5.465 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.284 ; 6.209 ; ; -5.435 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.284 ; 6.179 ; ; -5.383 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -2.201 ; 4.210 ; ; -5.332 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.982 ; 4.378 ; ; -5.223 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.284 ; 5.967 ; ; -5.013 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.503 ; 5.538 ; ; -4.961 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.284 ; 5.705 ; ; -3.467 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.402 ; 3.093 ; ; -3.201 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.296 ; 4.525 ; ; -3.111 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.461 ; 2.678 ; ; -3.005 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.404 ; 2.629 ; ; -2.848 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.237 ; 4.113 ; ; -2.739 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.294 ; 4.061 ; ; -2.467 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.461 ; 2.034 ; ; -2.323 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.237 ; 3.588 ; ; -1.985 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.426 ; 1.587 ; ; -1.815 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.429 ; 1.414 ; ; -1.722 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.272 ; 3.022 ; ; -1.704 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.426 ; 1.306 ; ; -1.699 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.432 ; 1.295 ; ; -1.560 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.272 ; 2.860 ; ; -1.482 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.266 ; 2.776 ; ; -1.445 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.269 ; 2.742 ; ; -1.397 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.426 ; 0.999 ; ; -1.376 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.500 ; 1.362 ; 3.465 ; ; -1.371 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.426 ; 0.973 ; ; -1.135 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.500 ; 3.060 ; 4.922 ; ; -0.768 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 1.000 ; 1.362 ; 3.357 ; ; -0.472 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 1.000 ; 3.060 ; 4.759 ; ; -0.450 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.500 ; 1.362 ; 2.539 ; ; -0.187 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.500 ; 3.060 ; 3.974 ; ; 0.058 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.272 ; 1.242 ; ; 0.063 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.272 ; 1.237 ; ; 0.168 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 1.000 ; 1.362 ; 2.421 ; ; 0.477 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 1.000 ; 3.060 ; 3.810 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'Reg8:_IR|16' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; -7.391 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.655 ; 8.541 ; ; -7.120 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.697 ; 8.312 ; ; -6.639 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.820 ; 7.954 ; ; -6.400 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.822 ; 7.717 ; ; -6.338 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.655 ; 7.488 ; ; -6.333 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.657 ; 7.485 ; ; -6.293 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.705 ; 7.493 ; ; -6.216 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.657 ; 7.368 ; ; -6.147 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.705 ; 7.347 ; ; -6.147 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.706 ; 7.348 ; ; -6.131 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.706 ; 7.332 ; ; -6.106 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.655 ; 7.256 ; ; -6.104 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.657 ; 7.256 ; ; -6.063 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.705 ; 7.263 ; ; -6.051 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.822 ; 7.368 ; ; -5.981 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.657 ; 7.133 ; ; -5.943 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.705 ; 7.143 ; ; -5.941 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.820 ; 7.256 ; ; -5.859 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.822 ; 7.176 ; ; -5.244 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.822 ; 6.561 ; ; -5.170 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.425 ; 8.090 ; ; -5.111 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.822 ; 6.428 ; ; -4.899 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.467 ; 7.861 ; ; -4.731 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.744 ; 5.970 ; ; -4.729 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.427 ; 7.651 ; ; -4.689 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.475 ; 7.659 ; ; -4.669 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.592 ; 7.756 ; ; -4.564 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.643 ; 5.702 ; ; -4.472 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.643 ; 5.610 ; ; -4.460 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.786 ; 5.741 ; ; -4.457 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.500 ; 5.452 ; ; -4.447 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.592 ; 7.534 ; ; -4.418 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.590 ; 7.503 ; ; -4.418 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.427 ; 7.340 ; ; -4.386 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.476 ; 7.357 ; ; -4.377 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.475 ; 7.347 ; ; -4.368 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.425 ; 7.288 ; ; -4.353 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.284 ; 5.132 ; ; -4.345 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.425 ; 7.265 ; ; -4.293 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.685 ; 5.473 ; ; -4.274 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.500 ; 5.269 ; ; -4.269 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.427 ; 7.191 ; ; -4.261 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.500 ; 5.256 ; ; -4.250 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.427 ; 7.172 ; ; -4.248 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.744 ; 5.487 ; ; -4.212 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.475 ; 7.182 ; ; -4.201 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.685 ; 5.381 ; ; -4.200 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.475 ; 7.170 ; ; -4.186 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.542 ; 5.223 ; ; -4.180 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.590 ; 7.265 ; ; -4.161 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.476 ; 7.132 ; ; -4.132 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.216 ; 3.411 ; ; -4.082 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.326 ; 4.903 ; ; -4.041 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.795 ; 5.331 ; ; -4.035 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.284 ; 4.814 ; ; -4.025 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.746 ; 5.266 ; ; -4.003 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.542 ; 5.040 ; ; -3.990 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.542 ; 5.027 ; ; -3.979 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.909 ; 5.383 ; ; -3.976 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.643 ; 5.114 ; ; -3.956 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.794 ; 5.245 ; ; -3.944 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.746 ; 5.185 ; ; -3.942 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.503 ; 4.940 ; ; -3.912 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.592 ; 6.999 ; ; -3.904 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.794 ; 5.193 ; ; -3.875 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.795 ; 5.165 ; ; -3.872 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.911 ; 5.278 ; ; -3.871 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.172 ; 3.194 ; ; -3.861 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.174 ; 3.182 ; ; -3.848 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.360 ; 2.983 ; ; -3.834 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.744 ; 5.073 ; ; -3.831 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.124 ; 3.202 ; ; -3.812 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.808 ; 5.115 ; ; -3.808 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.312 ; 2.991 ; ; -3.785 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.360 ; 2.920 ; ; -3.771 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.362 ; 2.904 ; ; -3.764 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.326 ; 4.585 ; ; -3.761 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.810 ; 5.066 ; ; -3.725 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.503 ; 4.723 ; ; -3.720 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.808 ; 5.023 ; ; -3.719 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.057 ; 3.157 ; ; -3.716 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.007 ; 3.204 ; ; -3.705 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.685 ; 4.885 ; ; -3.705 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.665 ; 4.865 ; ; -3.681 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.225 ; 2.951 ; ; -3.671 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.545 ; 4.711 ; ; -3.669 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.909 ; 5.073 ; ; -3.668 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.911 ; 5.074 ; ; -3.662 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.911 ; 5.068 ; ; -3.641 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.284 ; 4.420 ; ; -3.606 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.172 ; 2.929 ; ; -3.601 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.449 ; 4.545 ; ; -3.589 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.007 ; 3.077 ; ; -3.589 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.222 ; 2.862 ; ; -3.579 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.645 ; 4.719 ; ; -3.579 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.503 ; 4.577 ; ; -3.566 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.195 ; 2.866 ; ; -3.564 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.311 ; 2.748 ; ; -3.552 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.174 ; 2.873 ; ; -3.522 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.665 ; 4.682 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'Timing:inst1|inst2' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; -7.135 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.500 ; 7.630 ; ; -7.108 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.555 ; 7.548 ; ; -7.070 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.000 ; 8.065 ; ; -6.983 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.500 ; 7.478 ; ; -6.863 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.211 ; 8.069 ; ; -6.727 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.557 ; 7.165 ; ; -6.690 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.134 ; 7.551 ; ; -6.666 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.004 ; 7.665 ; ; -6.654 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.000 ; 7.649 ; ; -6.625 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.134 ; 7.486 ; ; -6.620 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.557 ; 7.058 ; ; -6.570 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.134 ; 7.431 ; ; -6.555 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.004 ; 7.554 ; ; -6.496 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.500 ; 6.991 ; ; -6.461 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.000 ; 7.456 ; ; -6.441 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.211 ; 7.647 ; ; -6.428 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.004 ; 7.427 ; ; -6.317 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.000 ; 7.312 ; ; -6.252 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.211 ; 7.458 ; ; -6.218 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.557 ; 6.656 ; ; -6.106 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.211 ; 7.312 ; ; -5.504 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.215 ; 7.714 ; ; -5.050 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.770 ; 7.815 ; ; -5.013 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.270 ; 7.278 ; ; -5.004 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.636 ; 7.635 ; ; -4.934 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.213 ; 7.142 ; ; -4.914 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.270 ; 7.179 ; ; -4.893 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.411 ; 5.477 ; ; -4.869 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.774 ; 7.638 ; ; -4.838 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.770 ; 7.603 ; ; -4.837 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.981 ; 7.813 ; ; -4.822 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.636 ; 7.453 ; ; -4.780 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.213 ; 6.988 ; ; -4.735 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.270 ; 7.000 ; ; -4.719 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.774 ; 7.488 ; ; -4.719 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|15 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.466 ; 5.248 ; ; -4.679 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.774 ; 7.448 ; ; -4.678 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.636 ; 7.309 ; ; -4.646 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.384 ; 3.257 ; ; -4.632 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.981 ; 7.608 ; ; -4.623 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.572 ; 3.046 ; ; -4.556 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.770 ; 7.321 ; ; -4.536 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.468 ; 5.063 ; ; -4.491 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.770 ; 7.256 ; ; -4.487 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.213 ; 6.695 ; ; -4.475 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.093 ; 5.563 ; ; -4.475 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.411 ; 5.059 ; ; -4.434 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.045 ; 5.384 ; ; -4.416 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.517 ; 2.894 ; ; -4.399 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.089 ; 5.483 ; ; -4.371 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.089 ; 5.455 ; ; -4.364 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.434 ; 2.925 ; ; -4.345 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.981 ; 7.321 ; ; -4.326 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.380 ; 2.941 ; ; -4.308 ; Reg8:_R2|19 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.512 ; 4.791 ; ; -4.295 ; Reg8:_R2|19 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.567 ; 4.723 ; ; -4.282 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.981 ; 7.258 ; ; -4.265 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|15 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.089 ; 5.349 ; ; -4.243 ; Reg8:_R2|19 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.012 ; 5.226 ; ; -4.224 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|16 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.411 ; 4.808 ; ; -4.216 ; Reg8:_R2|18 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.512 ; 4.699 ; ; -4.201 ; Reg8:_R1|18 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.655 ; 4.541 ; ; -4.193 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.300 ; 5.488 ; ; -4.192 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.829 ; 3.358 ; ; -4.189 ; Reg8:_R2|18 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.567 ; 4.617 ; ; -4.174 ; Reg8:_R1|18 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.710 ; 4.459 ; ; -4.169 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.017 ; 3.147 ; ; -4.164 ; Reg8:_R2|19 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.512 ; 4.647 ; ; -4.162 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.300 ; 5.457 ; ; -4.152 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -1.390 ; 3.257 ; ; -4.151 ; Reg8:_R2|18 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.012 ; 5.134 ; ; -4.129 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -1.578 ; 3.046 ; ; -4.097 ; Reg8:_R2|16 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.871 ; 4.221 ; ; -4.090 ; Reg8:_R2|19 ; Reg8:_IR|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.569 ; 4.516 ; ; -4.070 ; Reg8:_R2|16 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.926 ; 4.139 ; ; -4.064 ; Reg8:_R2|18 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.512 ; 4.547 ; ; -4.054 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|19 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.045 ; 5.004 ; ; -4.052 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|15 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.300 ; 5.347 ; ; -4.049 ; Reg8:_R1|18 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.655 ; 4.389 ; ; -4.048 ; Reg8:_R1|18 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.067 ; 4.976 ; ; -4.045 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|16 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.089 ; 5.129 ; ; -4.032 ; Reg8:_R2|16 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.371 ; 4.656 ; ; -4.029 ; Reg8:_R2|19 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.008 ; 5.016 ; ; -4.025 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|17 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.045 ; 4.975 ; ; -4.018 ; Reg8:_R1|17 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.655 ; 4.358 ; ; -4.016 ; Reg8:_R2|14 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.871 ; 4.140 ; ; -4.005 ; Reg8:_R1|19 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.655 ; 4.345 ; ; -3.991 ; Reg8:_R1|17 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.710 ; 4.276 ; ; -3.984 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|19 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.468 ; 4.511 ; ; -3.979 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.618 ; 3.356 ; ; -3.978 ; Reg8:_R1|19 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.710 ; 4.263 ; ; -3.973 ; Reg8:_R2|19 ; Reg8:_IR|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.569 ; 4.399 ; ; -3.961 ; Reg8:_R2|19 ; Reg8:_R2|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.064 ; 4.892 ; ; -3.956 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.806 ; 3.145 ; ; -3.954 ; Reg8:_R2|19 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; 0.281 ; 5.230 ; ; -3.945 ; Reg8:_R2|16 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.871 ; 4.069 ; ; -3.932 ; Reg8:_R1|15 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.707 ; 4.220 ; ; -3.929 ; Reg8:_R1|18 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; 0.056 ; 4.980 ; ; -3.923 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.879 ; 3.039 ; ; -3.922 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -1.523 ; 2.894 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'Timing:inst1|inst1' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -6.700 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.211 ; 7.517 ; ; -4.840 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.559 ; 7.427 ; ; -4.457 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 1.000 ; -0.032 ; 5.453 ; ; -4.070 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.228 ; 2.870 ; ; -3.982 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.040 ; 2.970 ; ; -3.980 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.091 ; 2.917 ; ; -3.959 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.228 ; 2.759 ; ; -3.873 ; Reg8:_R2|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.223 ; 4.678 ; ; -3.781 ; Reg8:_R2|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.223 ; 4.586 ; ; -3.766 ; Reg8:_R1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.366 ; 4.428 ; ; -3.700 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.090 ; 2.638 ; ; -3.670 ; Reg8:_R2|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.582 ; 4.116 ; ; -3.662 ; Reg8:_R2|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.582 ; 4.108 ; ; -3.583 ; Reg8:_R1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.366 ; 4.245 ; ; -3.576 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.234 ; 2.870 ; ; -3.570 ; Reg8:_R1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.366 ; 4.232 ; ; -3.552 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.530 ; 4.017 ; ; -3.488 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.046 ; 2.970 ; ; -3.487 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.091 ; 2.424 ; ; -3.486 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.097 ; 2.917 ; ; -3.465 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.234 ; 2.759 ; ; -3.452 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.038 ; 2.442 ; ; -3.441 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.082 ; 2.387 ; ; -3.434 ; Reg8:_R2|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.582 ; 3.880 ; ; -3.419 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst43 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.533 ; 3.881 ; ; -3.410 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst45 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.533 ; 3.872 ; ; -3.397 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.533 ; 3.859 ; ; -3.385 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.090 ; 2.323 ; ; -3.382 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.040 ; 2.370 ; ; -3.350 ; Reg8:_R1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.363 ; 4.015 ; ; -3.314 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.227 ; 2.115 ; ; -3.302 ; Reg8:_R1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.363 ; 3.967 ; ; -3.285 ; Reg8:_R2|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.223 ; 4.090 ; ; -3.256 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.526 ; 3.725 ; ; -3.251 ; Reg8:_R1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.363 ; 3.916 ; ; -3.229 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.090 ; 2.167 ; ; -3.224 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.040 ; 2.212 ; ; -3.206 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.096 ; 2.638 ; ; -3.184 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.226 ; 1.986 ; ; -3.164 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.227 ; 1.965 ; ; -3.094 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.226 ; 1.896 ; ; -3.077 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.216 ; 3.889 ; ; -3.068 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.532 ; 3.531 ; ; -3.043 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.228 ; 1.843 ; ; -3.033 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.090 ; 1.971 ; ; -3.003 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.038 ; 1.993 ; ; -2.993 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.097 ; 2.424 ; ; -2.958 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.044 ; 2.442 ; ; -2.947 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.088 ; 2.387 ; ; -2.935 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.040 ; 1.923 ; ; -2.915 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.038 ; 1.905 ; ; -2.891 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.096 ; 2.323 ; ; -2.888 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.046 ; 2.370 ; ; -2.820 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.233 ; 2.115 ; ; -2.763 ; Reg8:_R1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.363 ; 3.428 ; ; -2.735 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.096 ; 2.167 ; ; -2.733 ; Reg8:_R2|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.582 ; 3.179 ; ; -2.730 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.046 ; 2.212 ; ; -2.690 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.232 ; 1.986 ; ; -2.670 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.233 ; 1.965 ; ; -2.600 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.232 ; 1.896 ; ; -2.549 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.234 ; 1.843 ; ; -2.539 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.096 ; 1.971 ; ; -2.537 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.549 ; 3.016 ; ; -2.509 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.044 ; 1.993 ; ; -2.441 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.046 ; 1.923 ; ; -2.421 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.044 ; 1.905 ; ; -2.273 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.549 ; 2.752 ; ; -1.935 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.551 ; 2.412 ; ; -1.859 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.549 ; 2.338 ; ; -1.841 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.549 ; 2.320 ; ; -1.810 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.550 ; 2.288 ; ; -1.595 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.549 ; 2.074 ; ; -1.290 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.554 ; 1.764 ; ; -0.837 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.556 ; 1.309 ; ; -0.708 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.555 ; 1.181 ; ; -0.565 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.554 ; 1.039 ; ; -0.530 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.554 ; 1.004 ; ; -0.517 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.554 ; 0.991 ; ; -0.505 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.554 ; 0.979 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'CLK1' ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; -0.900 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 0.500 ; 2.365 ; 3.949 ; ; -0.694 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 0.500 ; 2.365 ; 3.743 ; ; -0.664 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 0.500 ; 2.466 ; 3.814 ; ; -0.529 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 0.500 ; 2.365 ; 3.578 ; ; -0.449 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 0.500 ; 2.365 ; 3.498 ; ; -0.389 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 0.500 ; 2.365 ; 3.438 ; ; -0.387 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 0.500 ; 2.365 ; 3.436 ; ; -0.362 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 0.500 ; 2.365 ; 3.411 ; ; -0.147 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 1.000 ; 2.365 ; 3.696 ; ; -0.125 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 1.000 ; 2.365 ; 3.674 ; ; 0.029 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 1.000 ; 2.466 ; 3.621 ; ; 0.036 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 1.000 ; 2.365 ; 3.513 ; ; 0.064 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 1.000 ; 2.365 ; 3.485 ; ; 0.114 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 1.000 ; 2.365 ; 3.435 ; ; 0.137 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 1.000 ; 2.365 ; 3.412 ; ; 0.190 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 1.000 ; 2.365 ; 3.359 ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -0.147 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.042 ; 1.572 ; ; -0.125 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.341 ; 1.893 ; ; -0.105 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.861 ; 1.433 ; ; -0.073 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.972 ; 1.576 ; ; -0.062 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.836 ; 1.931 ; ; -0.050 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.837 ; 1.944 ; ; -0.037 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.179 ; 1.819 ; ; 0.040 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.530 ; 3.926 ; ; 0.084 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.076 ; 1.837 ; ; 0.088 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.178 ; 1.943 ; ; 0.090 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.836 ; 2.083 ; ; 0.120 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.532 ; 4.008 ; ; 0.174 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.531 ; 4.061 ; ; 0.174 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.078 ; 1.929 ; ; 0.185 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.835 ; 2.177 ; ; 0.209 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.150 ; 2.536 ; ; 0.239 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.530 ; 4.125 ; ; 0.246 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.836 ; 2.239 ; ; 0.247 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.017 ; 2.441 ; ; 0.252 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.530 ; 4.138 ; ; 0.262 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.530 ; 4.148 ; ; 0.282 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.042 ; 2.001 ; ; 0.298 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.698 ; 2.153 ; ; 0.319 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.530 ; 4.205 ; ; 0.347 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.076 ; 2.100 ; ; 0.361 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.012 ; 2.550 ; ; 0.387 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.362 ; 1.426 ; ; 0.390 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.835 ; 2.382 ; ; 0.396 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.013 ; 2.586 ; ; 0.403 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.017 ; 2.597 ; ; 0.421 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.042 ; 2.140 ; ; 0.422 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.095 ; 2.194 ; ; 0.477 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.699 ; 2.333 ; ; 0.483 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.151 ; 2.811 ; ; 0.488 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.649 ; 2.294 ; ; 0.493 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.078 ; 2.248 ; ; 0.499 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.078 ; 2.254 ; ; 0.500 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.359 ; 1.536 ; ; 0.500 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.648 ; 2.305 ; ; 0.501 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.698 ; 2.356 ; ; 0.512 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.648 ; 2.317 ; ; 0.525 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.042 ; 2.244 ; ; 0.527 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.311 ; 1.515 ; ; 0.538 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.194 ; 1.409 ; ; 0.570 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.341 ; 2.588 ; ; 0.574 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.530 ; 3.980 ; ; 0.578 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.647 ; 2.382 ; ; 0.581 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.076 ; 2.334 ; ; 0.591 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.042 ; 2.310 ; ; 0.593 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.015 ; 2.785 ; ; 0.593 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.806 ; 2.576 ; ; 0.603 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.700 ; 2.460 ; ; 0.622 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.078 ; 2.377 ; ; 0.630 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.532 ; 4.038 ; ; 0.635 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.017 ; 2.829 ; ; 0.636 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.341 ; 2.654 ; ; 0.644 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.806 ; 2.627 ; ; 0.647 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.076 ; 2.400 ; ; 0.661 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.691 ; 2.509 ; ; 0.674 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.151 ; 3.002 ; ; 0.688 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.013 ; 2.878 ; ; 0.699 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.806 ; 2.682 ; ; 0.700 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.531 ; 4.107 ; ; 0.726 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.078 ; 2.481 ; ; 0.731 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.151 ; 3.059 ; ; 0.739 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.959 ; 2.375 ; ; 0.756 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.530 ; 4.162 ; ; 0.769 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.530 ; 4.175 ; ; 0.783 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.195 ; 1.655 ; ; 0.792 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.078 ; 2.547 ; ; 0.802 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.013 ; 2.992 ; ; 0.808 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.530 ; 4.214 ; ; 0.811 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.042 ; 2.530 ; ; 0.823 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.042 ; 2.542 ; ; 0.826 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.700 ; 2.683 ; ; 0.827 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.179 ; 2.683 ; ; 0.835 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.530 ; 4.241 ; ; 0.842 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.013 ; 3.032 ; ; 0.847 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.341 ; 2.865 ; ; 0.851 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.360 ; 1.888 ; ; 0.859 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.341 ; 2.877 ; ; 0.861 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.836 ; 2.854 ; ; 0.864 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.257 ; 2.798 ; ; 0.872 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.151 ; 3.200 ; ; 0.876 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.076 ; 2.629 ; ; 0.879 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.311 ; 1.867 ; ; 0.882 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.013 ; 3.072 ; ; 0.883 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.699 ; 2.739 ; ; 0.888 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.076 ; 2.641 ; ; 0.894 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.649 ; 2.700 ; ; 0.896 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.875 ; 2.948 ; ; 0.900 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.178 ; 2.755 ; ; 0.913 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.312 ; 1.902 ; ; 0.914 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.195 ; 1.786 ; ; 0.916 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 3.846 ; 4.939 ; ; 0.921 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.017 ; 3.115 ; ; 0.935 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.334 ; 1.426 ; ; 0.939 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.994 ; 2.610 ; ; 0.957 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 2.151 ; 3.285 ; ; 0.991 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.057 ; 1.725 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'Timing:inst1|inst' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; 0.017 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.000 ; 3.192 ; 3.615 ; ; 0.394 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.533 ; 1.134 ; ; 0.404 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.533 ; 1.144 ; ; 0.454 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.000 ; 1.422 ; 2.282 ; ; 0.658 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; -0.500 ; 3.192 ; 3.756 ; ; 0.746 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.000 ; 3.192 ; 4.344 ; ; 1.050 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; -0.500 ; 1.422 ; 2.378 ; ; 1.087 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.000 ; 1.422 ; 2.915 ; ; 1.268 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; -0.500 ; 3.192 ; 4.366 ; ; 1.664 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; -0.500 ; 1.422 ; 2.992 ; ; 1.810 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.530 ; 2.547 ; ; 1.836 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.526 ; 2.569 ; ; 1.854 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.533 ; 2.594 ; ; 1.910 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.237 ; 0.880 ; ; 1.937 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.237 ; 0.907 ; ; 2.055 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.532 ; 2.794 ; ; 2.192 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.237 ; 1.162 ; ; 2.216 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.244 ; 1.179 ; ; 2.306 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.240 ; 1.273 ; ; 2.492 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.238 ; 1.461 ; ; 2.611 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.500 ; 3.318 ; ; 2.949 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.270 ; 1.886 ; ; 3.015 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.500 ; 3.722 ; ; 3.087 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.555 ; 3.849 ; ; 3.428 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.215 ; 2.420 ; ; 3.452 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.270 ; 2.389 ; ; 3.575 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.557 ; 4.339 ; ; 3.916 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.213 ; 2.910 ; ; 4.066 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.000 ; 4.273 ; ; 4.366 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 1.830 ; 6.383 ; ; 4.394 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.211 ; 4.390 ; ; 4.562 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.770 ; 2.999 ; ; 4.572 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.000 ; 4.779 ; ; 4.593 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.134 ; 4.934 ; ; 4.606 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.211 ; 4.602 ; ; 4.607 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.004 ; 4.810 ; ; 4.613 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.211 ; 4.609 ; ; 4.646 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.000 ; 4.853 ; ; 4.744 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 0.060 ; 4.991 ; ; 4.773 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.134 ; 5.114 ; ; 4.889 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.000 ; 5.096 ; ; 4.890 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.981 ; 3.116 ; ; 4.892 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.004 ; 5.095 ; ; 4.925 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.004 ; 5.128 ; ; 4.969 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.134 ; 5.310 ; ; 5.068 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.770 ; 3.505 ; ; 5.089 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.636 ; 3.660 ; ; 5.102 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.981 ; 3.328 ; ; 5.103 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.774 ; 3.536 ; ; 5.109 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.981 ; 3.335 ; ; 5.130 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.211 ; 5.126 ; ; 5.141 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.770 ; 3.578 ; ; 5.269 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.636 ; 3.840 ; ; 5.385 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.770 ; 3.822 ; ; 5.388 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.774 ; 3.821 ; ; 5.421 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.774 ; 3.854 ; ; 5.465 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.636 ; 4.036 ; ; 5.626 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.981 ; 3.852 ; ; 6.373 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 0.132 ; 6.692 ; ; 6.869 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; -1.638 ; 5.418 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'CLK1' ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; 0.275 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 0.000 ; 2.466 ; 3.127 ; ; 0.325 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 0.000 ; 2.466 ; 3.177 ; ; 0.346 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 0.000 ; 2.466 ; 3.198 ; ; 0.423 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 0.000 ; 2.466 ; 3.275 ; ; 0.501 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 0.000 ; 2.466 ; 3.353 ; ; 0.527 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 0.000 ; 2.571 ; 3.484 ; ; 0.671 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 0.000 ; 2.466 ; 3.523 ; ; 0.704 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 0.000 ; 2.466 ; 3.556 ; ; 0.859 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; -0.500 ; 2.466 ; 3.211 ; ; 0.882 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; -0.500 ; 2.466 ; 3.234 ; ; 0.885 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; -0.500 ; 2.466 ; 3.237 ; ; 0.942 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; -0.500 ; 2.466 ; 3.294 ; ; 1.090 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; -0.500 ; 2.466 ; 3.442 ; ; 1.212 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; -0.500 ; 2.571 ; 3.669 ; ; 1.227 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; -0.500 ; 2.466 ; 3.579 ; ; 1.446 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; -0.500 ; 2.466 ; 3.798 ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'Reg8:_IR|16' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; 0.935 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.334 ; 1.426 ; ; 1.048 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.331 ; 1.536 ; ; 1.075 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.283 ; 1.515 ; ; 1.189 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 1.409 ; ; 1.399 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.332 ; 1.888 ; ; 1.412 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.842 ; 1.931 ; ; 1.424 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.843 ; 1.944 ; ; 1.427 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.283 ; 1.867 ; ; 1.434 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.064 ; 1.655 ; ; 1.461 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.284 ; 1.902 ; ; 1.539 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.029 ; 1.725 ; ; 1.564 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.842 ; 2.083 ; ; 1.565 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.064 ; 1.786 ; ; 1.601 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.332 ; 2.090 ; ; 1.607 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.194 ; 1.958 ; ; 1.640 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.332 ; 2.129 ; ; 1.659 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.841 ; 2.177 ; ; 1.703 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.156 ; 2.536 ; ; 1.720 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.842 ; 2.239 ; ; 1.741 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.023 ; 2.441 ; ; 1.741 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.021 ; 1.877 ; ; 1.752 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 1.972 ; ; 1.772 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.704 ; 2.153 ; ; 1.782 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.064 ; 2.003 ; ; 1.809 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.029 ; 1.995 ; ; 1.811 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.197 ; 2.165 ; ; 1.820 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.021 ; 1.956 ; ; 1.822 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.064 ; 2.043 ; ; 1.855 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.018 ; 2.550 ; ; 1.861 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.197 ; 2.215 ; ; 1.864 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.841 ; 2.382 ; ; 1.871 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.096 ; 2.124 ; ; 1.890 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.019 ; 2.586 ; ; 1.890 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.110 ; ; 1.897 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.023 ; 2.597 ; ; 1.907 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.021 ; 2.043 ; ; 1.909 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.129 ; ; 1.940 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.032 ; 2.129 ; ; 1.951 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.705 ; 2.333 ; ; 1.962 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.655 ; 2.294 ; ; 1.974 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.654 ; 2.305 ; ; 1.975 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.704 ; 2.356 ; ; 1.977 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.157 ; 2.811 ; ; 1.986 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.654 ; 2.317 ; ; 1.993 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.194 ; 2.344 ; ; 2.031 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.029 ; 2.217 ; ; 2.040 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.096 ; 2.293 ; ; 2.042 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.021 ; 2.178 ; ; 2.052 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.653 ; 2.382 ; ; 2.077 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.188 ; 2.422 ; ; 2.077 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.706 ; 2.460 ; ; 2.085 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.305 ; ; 2.086 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.281 ; 2.524 ; ; 2.087 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.021 ; 2.785 ; ; 2.087 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.812 ; 2.576 ; ; 2.090 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.290 ; 2.537 ; ; 2.101 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.194 ; 2.452 ; ; 2.101 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.321 ; ; 2.112 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.332 ; ; 2.129 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.023 ; 2.829 ; ; 2.135 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.697 ; 2.509 ; ; 2.138 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.812 ; 2.627 ; ; 2.147 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.096 ; 2.400 ; ; 2.155 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.023 ; 2.335 ; ; 2.160 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.284 ; 2.601 ; ; 2.168 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.157 ; 3.002 ; ; 2.182 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.019 ; 2.878 ; ; 2.193 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.812 ; 2.682 ; ; 2.193 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.413 ; ; 2.219 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.439 ; ; 2.225 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.157 ; 3.059 ; ; 2.274 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.093 ; 2.524 ; ; 2.296 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.019 ; 2.992 ; ; 2.296 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.516 ; ; 2.300 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.706 ; 2.683 ; ; 2.325 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.576 ; 1.426 ; ; 2.335 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.842 ; 2.854 ; ; 2.336 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.019 ; 3.032 ; ; 2.338 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.030 ; 2.525 ; ; 2.357 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.705 ; 2.739 ; ; 2.366 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.157 ; 3.200 ; ; 2.368 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.655 ; 2.700 ; ; 2.376 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.019 ; 3.072 ; ; 2.385 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.332 ; 2.874 ; ; 2.386 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.606 ; ; 2.388 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.064 ; 2.609 ; ; 2.390 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.881 ; 2.948 ; ; 2.390 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.063 ; 2.610 ; ; 2.410 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; -0.500 ; 2.852 ; 4.939 ; ; 2.415 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.023 ; 3.115 ; ; 2.438 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.579 ; 1.536 ; ; 2.451 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.157 ; 3.285 ; ; 2.458 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.096 ; 2.711 ; ; 2.465 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.627 ; 1.515 ; ; 2.476 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.744 ; 1.409 ; ; 2.485 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.331 ; 2.973 ; ; 2.496 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; -0.500 ; 2.853 ; 5.026 ; ; 2.508 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.653 ; 2.838 ; ; 2.509 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.653 ; 2.839 ; ; 2.512 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.093 ; 2.762 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'Timing:inst1|inst1' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.945 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.269 ; 0.883 ; ; 0.959 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.269 ; 0.897 ; ; 0.968 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.269 ; 0.906 ; ; 0.995 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.269 ; 0.933 ; ; 1.159 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.270 ; 1.096 ; ; 1.264 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.270 ; 1.201 ; ; 1.700 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.269 ; 1.638 ; ; 1.922 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.265 ; 1.864 ; ; 2.089 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.266 ; 2.030 ; ; 2.148 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.265 ; 2.090 ; ; 2.176 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.265 ; 2.118 ; ; 2.189 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.266 ; 2.130 ; ; 2.342 ; Reg8:_R1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.085 ; 2.464 ; ; 2.440 ; Reg8:_R2|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.296 ; 2.351 ; ; 2.531 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.265 ; 2.473 ; ; 2.606 ; Reg8:_R1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.085 ; 2.728 ; ; 2.662 ; Reg8:_R1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.085 ; 2.784 ; ; 2.663 ; Reg8:_R2|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.296 ; 2.574 ; ; 2.670 ; Reg8:_R2|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.296 ; 2.581 ; ; 2.693 ; Reg8:_R2|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.049 ; 2.949 ; ; 2.707 ; Reg8:_R1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.089 ; 2.825 ; ; 2.773 ; Reg8:_R1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.089 ; 2.891 ; ; 2.802 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.907 ; 1.602 ; ; 2.810 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.740 ; 1.777 ; ; 2.822 ; Reg8:_R2|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.049 ; 3.078 ; ; 2.854 ; Reg8:_R2|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.049 ; 3.110 ; ; 2.868 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.742 ; 1.833 ; ; 2.874 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.265 ; 2.816 ; ; 2.888 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.905 ; 1.690 ; ; 2.898 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.740 ; 1.865 ; ; 2.932 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.790 ; 1.849 ; ; 2.946 ; Reg8:_R1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.085 ; 3.068 ; ; 2.952 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.907 ; 1.752 ; ; 2.974 ; Reg8:_R1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.089 ; 3.092 ; ; 2.977 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.905 ; 1.779 ; ; 3.113 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.742 ; 2.078 ; ; 3.149 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.790 ; 2.066 ; ; 3.151 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.907 ; 1.951 ; ; 3.169 ; Reg8:_R2|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.296 ; 3.080 ; ; 3.244 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.742 ; 2.209 ; ; 3.246 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.851 ; 1.602 ; ; 3.254 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.684 ; 1.777 ; ; 3.279 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.790 ; 2.196 ; ; 3.299 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.782 ; 2.224 ; ; 3.312 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.686 ; 1.833 ; ; 3.331 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.740 ; 2.298 ; ; 3.332 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.849 ; 1.690 ; ; 3.342 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.684 ; 1.865 ; ; 3.344 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.791 ; 2.260 ; ; 3.376 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.734 ; 1.849 ; ; 3.396 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.851 ; 1.752 ; ; 3.407 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.043 ; 3.657 ; ; 3.421 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.849 ; 1.779 ; ; 3.432 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.745 ; 5.384 ; ; 3.455 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.272 ; 3.360 ; ; 3.557 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.686 ; 2.078 ; ; 3.593 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.734 ; 2.066 ; ; 3.595 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.851 ; 1.951 ; ; 3.603 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.790 ; 2.520 ; ; 3.627 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.266 ; 3.538 ; ; 3.688 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.686 ; 2.209 ; ; 3.700 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.907 ; 2.500 ; ; 3.723 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.734 ; 2.196 ; ; 3.743 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.726 ; 2.224 ; ; 3.748 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.272 ; 3.653 ; ; 3.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst45 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.272 ; 3.667 ; ; 3.775 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.684 ; 2.298 ; ; 3.783 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst43 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.272 ; 3.688 ; ; 3.788 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.735 ; 2.260 ; ; 3.800 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.742 ; 2.765 ; ; 3.823 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.791 ; 2.739 ; ; 3.858 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.907 ; 2.658 ; ; 3.898 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.269 ; 3.806 ; ; 3.983 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 0.000 ; 0.041 ; 4.211 ; ; 4.047 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.734 ; 2.520 ; ; 4.144 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.851 ; 2.500 ; ; 4.244 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.686 ; 2.765 ; ; 4.267 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.735 ; 2.739 ; ; 4.302 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.851 ; 2.658 ; ; 4.454 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.047 ; 4.708 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'Timing:inst1|inst2' ; +-------+----------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; 2.029 ; Reg8:_AR_BUSIN3|13 ; Reg8:_R2|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.191 ; 2.397 ; ; 2.061 ; Reg8:_AR_BUSIN3|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.191 ; 2.429 ; ; 2.149 ; Reg8:_AR_BUSIN3|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.190 ; 2.516 ; ; 2.244 ; Reg8:_AR_BUSIN3|13 ; Reg8:_R1|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.028 ; 2.393 ; ; 2.280 ; Reg8:_AR_BUSIN3|17 ; Reg8:_IR|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.608 ; 1.849 ; ; 2.280 ; Reg8:_AR_BUSIN3|16 ; Reg8:_R1|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.028 ; 2.429 ; ; 2.337 ; Reg8:_AR_BUSIN3|13 ; Reg8:_IR|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.549 ; 1.965 ; ; 2.368 ; Reg8:_AR_BUSIN3|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.029 ; 2.516 ; ; 2.410 ; Reg8:_AR_BUSIN3|18 ; Reg8:_R2|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.169 ; 2.418 ; ; 2.445 ; Reg8:_AR_BUSIN3|14 ; Reg8:_R2|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.191 ; 2.813 ; ; 2.446 ; Reg8:_AR_BUSIN3|17 ; Reg8:_R1|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.025 ; 2.598 ; ; 2.450 ; Reg8:_AR_BUSIN3|18 ; Reg8:_R1|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.026 ; 2.601 ; ; 2.464 ; Reg8:_R1|13 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 2.992 ; ; 2.495 ; Reg8:_AR_BUSIN3|16 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.549 ; 2.123 ; ; 2.541 ; Reg8:_AR_BUSIN3|18 ; Reg8:_IR|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.609 ; 2.109 ; ; 2.593 ; Reg8:_AR_BUSIN3|17 ; Reg8:_R2|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.168 ; 2.602 ; ; 2.662 ; Reg8:_AR_BUSIN3|14 ; Reg8:_R1|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.028 ; 2.811 ; ; 2.757 ; Reg8:_R1|17 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.367 ; 3.281 ; ; 2.766 ; Reg8:_R1|13 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.064 ; 2.987 ; ; 2.783 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R2|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.284 ; 2.176 ; ; 2.786 ; Reg8:_R1|15 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.314 ; ; 2.792 ; Reg8:_R1|13 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.369 ; 2.580 ; ; 2.811 ; Reg8:_AR_BUSIN3|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.607 ; 2.381 ; ; 2.862 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_R2|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.449 ; 2.090 ; ; 2.864 ; Reg8:_R1|15 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.392 ; ; 2.886 ; Reg8:_AR_BUSIN3|19 ; Reg8:_R1|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.025 ; 3.038 ; ; 2.902 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_R2|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.284 ; 2.295 ; ; 2.917 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_R2|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.284 ; 2.310 ; ; 2.923 ; Reg8:_R2|17 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.423 ; 3.503 ; ; 2.925 ; Reg8:_R1|17 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.432 ; 2.650 ; ; 2.925 ; Reg8:_R1|14 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.453 ; ; 2.935 ; Reg8:_R1|17 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.367 ; 3.459 ; ; 2.938 ; Reg8:_R1|16 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.466 ; ; 2.973 ; Reg8:_AR_BUSIN3|19 ; Reg8:_IR|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.608 ; 2.542 ; ; 2.995 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_R2|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.449 ; 2.223 ; ; 3.002 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R1|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.503 ; 2.176 ; ; 3.007 ; Reg8:_R2|17 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.294 ; 2.870 ; ; 3.027 ; Reg8:_AR_BUSIN3|19 ; Reg8:_R2|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.168 ; 3.036 ; ; 3.031 ; Reg8:_R1|16 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.559 ; ; 3.048 ; Reg8:_R1|18 ; Reg8:_R2|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.008 ; 3.213 ; ; 3.060 ; Reg8:_R2|17 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.286 ; 3.503 ; ; 3.064 ; Reg8:_R1|17 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.060 ; 3.281 ; ; 3.074 ; Reg8:_R2|18 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.289 ; 3.520 ; ; 3.081 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_R1|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.668 ; 2.090 ; ; 3.084 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.250 ; 1.511 ; ; 3.091 ; Reg8:_R1|15 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.064 ; 3.312 ; ; 3.096 ; Reg8:_R1|17 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.367 ; 3.620 ; ; 3.100 ; Reg8:_R2|17 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.423 ; 3.680 ; ; 3.103 ; Reg8:_R1|16 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.631 ; ; 3.116 ; Reg8:_R2|18 ; Reg8:_R2|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.064 ; 3.337 ; ; 3.119 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_R1|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.503 ; 2.293 ; ; 3.123 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_R2|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.810 ; 1.990 ; ; 3.132 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_R1|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.503 ; 2.306 ; ; 3.137 ; Reg8:_R2|13 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.078 ; 3.372 ; ; 3.156 ; Reg8:_R2|16 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.078 ; 3.391 ; ; 3.163 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_R1|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.667 ; 2.173 ; ; 3.165 ; Reg8:_R2|18 ; Reg8:_IR|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.294 ; 3.028 ; ; 3.168 ; Reg8:_R2|17 ; Reg8:_R1|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.289 ; 3.614 ; ; 3.171 ; Reg8:_R1|15 ; Reg8:_R1|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.064 ; 3.392 ; ; 3.173 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_R2|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.645 ; 2.205 ; ; 3.174 ; Reg8:_R1|18 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.367 ; 3.698 ; ; 3.176 ; Reg8:_R1|18 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.063 ; 3.396 ; ; 3.176 ; Reg8:_R1|15 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.704 ; ; 3.179 ; Reg8:_R1|17 ; Reg8:_R1|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.063 ; 3.399 ; ; 3.179 ; Reg8:_R1|18 ; Reg8:_IR|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.432 ; 2.904 ; ; 3.183 ; Reg8:_R1|14 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.371 ; 3.711 ; ; 3.191 ; Reg8:_R1|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.373 ; 2.975 ; ; 3.197 ; Reg8:_R2|19 ; Reg8:_R1|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.289 ; 3.643 ; ; 3.205 ; Reg8:_R2|19 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.423 ; 3.785 ; ; 3.210 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_R1|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.668 ; 2.219 ; ; 3.211 ; Reg8:_AR_BUSIN3|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.549 ; 2.839 ; ; 3.214 ; Reg8:_R2|15 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.078 ; 3.449 ; ; 3.217 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.024 ; 1.870 ; ; 3.223 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_R1|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.502 ; 2.398 ; ; 3.225 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_IR|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.024 ; 1.878 ; ; 3.227 ; Reg8:_R1|14 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.064 ; 3.448 ; ; 3.227 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -1.228 ; 2.176 ; ; 3.229 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_R2|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.335 ; 2.571 ; ; 3.235 ; Reg8:_R2|17 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.286 ; 3.678 ; ; 3.238 ; Reg8:_R1|17 ; Reg8:_R2|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.008 ; 3.403 ; ; 3.240 ; Reg8:_R1|17 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.060 ; 3.457 ; ; 3.243 ; Reg8:_R1|16 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.064 ; 3.464 ; ; 3.244 ; Reg8:_R1|14 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.369 ; 3.032 ; ; 3.247 ; Reg8:_R2|18 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.423 ; 3.827 ; ; 3.253 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_R2|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.693 ; 2.237 ; ; 3.254 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.250 ; 1.681 ; ; 3.260 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_R1|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.667 ; 2.270 ; ; 3.261 ; Reg8:_R2|16 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.078 ; 3.496 ; ; 3.265 ; Reg8:_R2|17 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.423 ; 3.845 ; ; 3.269 ; Reg8:_R2|13 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.059 ; 3.367 ; ; 3.275 ; Reg8:_R1|19 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.367 ; 3.799 ; ; 3.275 ; Reg8:_R2|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.235 ; 3.197 ; ; 3.284 ; Reg8:_R2|19 ; Reg8:_IR|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.294 ; 3.147 ; ; 3.289 ; Reg8:_R2|19 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.294 ; 3.152 ; ; 3.293 ; Reg8:_R2|16 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.059 ; 3.391 ; ; 3.293 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_R1|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.550 ; 2.420 ; ; 3.296 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.189 ; 1.784 ; ; 3.303 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.189 ; 1.791 ; ; 3.306 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -1.393 ; 2.090 ; ; 3.322 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.085 ; 1.914 ; +-------+----------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Recovery: 'Timing:inst1|inst1' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -8.993 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.530 ; 9.458 ; ; -6.170 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.244 ; 8.409 ; ; -6.166 ; Reg8:_R2|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.542 ; 6.619 ; ; -6.074 ; Reg8:_R2|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.542 ; 6.527 ; ; -6.059 ; Reg8:_R1|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.685 ; 6.369 ; ; -5.955 ; Reg8:_R2|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.901 ; 6.049 ; ; -5.876 ; Reg8:_R1|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.685 ; 6.186 ; ; -5.863 ; Reg8:_R1|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.685 ; 6.173 ; ; -5.637 ; Reg8:_R2|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.901 ; 5.731 ; ; -5.633 ; Reg8:_R2|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.901 ; 5.727 ; ; -5.578 ; Reg8:_R2|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.542 ; 6.031 ; ; -5.544 ; Reg8:_R1|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.682 ; 5.857 ; ; -5.514 ; Reg8:_R1|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.682 ; 5.827 ; ; -5.433 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.238 ; 7.666 ; ; -5.302 ; Reg8:_R1|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.682 ; 5.615 ; ; -5.261 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.237 ; 7.493 ; ; -5.171 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.240 ; 7.406 ; ; -5.092 ; Reg8:_R2|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.901 ; 5.186 ; ; -5.030 ; Reg8:_R1|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.682 ; 5.343 ; ; -3.499 ; Reg8:_IR|17 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.098 ; 4.396 ; ; -3.103 ; Reg8:_IR|14 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.163 ; 3.935 ; ; -3.037 ; Reg8:_IR|15 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.100 ; 3.932 ; ; -2.372 ; Reg8:_IR|13 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.164 ; 3.203 ; ; -1.248 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.660 ; 4.602 ; ; -1.184 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.659 ; 4.537 ; ; -1.091 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.666 ; 4.451 ; ; -1.085 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.662 ; 4.441 ; ; -0.643 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.660 ; 4.497 ; ; -0.563 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.659 ; 4.416 ; ; -0.520 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.666 ; 4.380 ; ; -0.442 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; 2.660 ; 3.796 ; ; -0.437 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.662 ; 4.293 ; ; 0.182 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 1.000 ; 2.660 ; 3.672 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Recovery: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -2.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 2.029 ; 5.570 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; -0.476 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.451 ; 4.621 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; ; 0.089 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.451 ; 4.556 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Removal: 'Timing:inst1|inst1' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.362 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.000 ; 2.788 ; 3.526 ; ; 0.879 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.791 ; 4.046 ; ; 0.924 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.794 ; 4.094 ; ; 0.976 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; 2.788 ; 3.640 ; ; 1.054 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.788 ; 4.218 ; ; 1.106 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.788 ; 4.270 ; ; 1.462 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.791 ; 4.129 ; ; 1.485 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.794 ; 4.155 ; ; 1.640 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.788 ; 4.304 ; ; 1.714 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.788 ; 4.378 ; ; 2.687 ; Reg8:_IR|13 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.096 ; 2.960 ; ; 3.265 ; Reg8:_IR|15 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.157 ; 3.599 ; ; 3.360 ; Reg8:_IR|14 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.096 ; 3.633 ; ; 3.753 ; Reg8:_IR|17 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.159 ; 4.089 ; ; 4.089 ; Reg8:_R1|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.401 ; 3.865 ; ; 4.417 ; Reg8:_R2|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.612 ; 3.982 ; ; 4.561 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.432 ; 6.170 ; ; 4.595 ; Reg8:_R1|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.401 ; 4.371 ; ; 4.616 ; Reg8:_R2|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.267 ; 4.526 ; ; 4.629 ; Reg8:_R2|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.612 ; 4.194 ; ; 4.630 ; Reg8:_R1|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.405 ; 4.402 ; ; 4.636 ; Reg8:_R2|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.612 ; 4.201 ; ; 4.649 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.429 ; 6.255 ; ; 4.682 ; Reg8:_R1|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.401 ; 4.458 ; ; 4.796 ; Reg8:_R2|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.267 ; 4.706 ; ; 4.877 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.426 ; 6.480 ; ; 4.912 ; Reg8:_R1|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.401 ; 4.688 ; ; 4.915 ; Reg8:_R1|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.405 ; 4.687 ; ; 4.948 ; Reg8:_R1|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.405 ; 4.720 ; ; 4.992 ; Reg8:_R2|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.267 ; 4.902 ; ; 5.034 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.426 ; 6.637 ; ; 5.153 ; Reg8:_R2|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.612 ; 4.718 ; ; 6.376 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.269 ; 6.284 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Removal: 'Timing:inst1|inst3' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.405 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.614 ; 4.375 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 0.943 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.614 ; 4.433 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; ; 2.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.252 ; 5.053 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ----------------------------------------------- ; Slow 1200mV 85C Model Metastability Summary ; ----------------------------------------------- No synchronizer chains to report. +----------------------------------------------------------+ ; Slow 1200mV 0C Model Fmax Summary ; +------------+-----------------+--------------------+------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +------------+-----------------+--------------------+------+ ; 69.15 MHz ; 69.15 MHz ; Timing:inst1|inst3 ; ; ; 107.71 MHz ; 107.71 MHz ; Timing:inst1|inst ; ; ; 201.21 MHz ; 201.21 MHz ; Timing:inst1|inst1 ; ; ; 209.38 MHz ; 209.38 MHz ; Timing:inst1|inst2 ; ; ; 308.26 MHz ; 308.26 MHz ; Reg8:_IR|16 ; ; +------------+-----------------+--------------------+------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. +---------------------------------------------+ ; Slow 1200mV 0C Model Setup Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst3 ; -9.459 ; -244.814 ; ; Timing:inst1|inst ; -8.284 ; -16.263 ; ; Reg8:_IR|16 ; -6.609 ; -115.273 ; ; Timing:inst1|inst2 ; -6.297 ; -122.706 ; ; Timing:inst1|inst1 ; -5.949 ; -27.101 ; ; CLK1 ; -0.688 ; -2.259 ; +--------------------+--------+---------------+ +---------------------------------------------+ ; Slow 1200mV 0C Model Hold Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst3 ; -0.107 ; -0.467 ; ; Timing:inst1|inst ; 0.074 ; 0.000 ; ; CLK1 ; 0.177 ; 0.000 ; ; Reg8:_IR|16 ; 0.862 ; 0.000 ; ; Timing:inst1|inst1 ; 0.875 ; 0.000 ; ; Timing:inst1|inst2 ; 1.861 ; 0.000 ; +--------------------+--------+---------------+ +---------------------------------------------+ ; Slow 1200mV 0C Model Recovery Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst1 ; -7.972 ; -22.912 ; ; Timing:inst1|inst3 ; -2.185 ; -17.480 ; +--------------------+--------+---------------+ +--------------------------------------------+ ; Slow 1200mV 0C Model Removal Summary ; +--------------------+-------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+-------+---------------+ ; Timing:inst1|inst1 ; 0.354 ; 0.000 ; ; Timing:inst1|inst3 ; 0.417 ; 0.000 ; +--------------------+-------+---------------+ +--------------------------------------------------+ ; Slow 1200mV 0C Model Minimum Pulse Width Summary ; +--------------------+--------+--------------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+--------------------+ ; CLK1 ; -3.000 ; -8.000 ; ; Timing:inst1|inst1 ; -2.174 ; -12.522 ; ; Timing:inst1|inst ; -2.174 ; -4.348 ; ; Timing:inst1|inst3 ; -1.000 ; -43.000 ; ; Reg8:_IR|16 ; -1.000 ; -21.000 ; ; Timing:inst1|inst2 ; -1.000 ; -21.000 ; +--------------------+--------+--------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -9.459 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.422 ; 6.146 ; ; -9.015 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.600 ; 6.132 ; ; -8.993 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.492 ; 6.848 ; ; -8.732 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.494 ; 6.236 ; ; -8.561 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.301 ; 6.766 ; ; -8.475 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.736 ; 6.425 ; ; -8.221 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.469 ; 6.163 ; ; -8.221 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.599 ; 6.205 ; ; -7.779 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.161 ; 6.049 ; ; -7.617 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.357 ; 4.369 ; ; -7.459 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.091 ; 6.897 ; ; -7.292 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.017 ; 5.992 ; ; -7.256 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.089 ; 6.343 ; ; -7.172 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.535 ; 4.354 ; ; -6.939 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.153 ; 6.472 ; ; -6.809 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.016 ; 6.376 ; ; -6.809 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.438 ; 3.480 ; ; -6.734 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.427 ; 4.654 ; ; -6.731 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.460 ; 1.988 ; ; -6.699 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.438 ; 3.370 ; ; -6.692 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.577 ; 3.224 ; ; -6.692 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.359 ; 2.050 ; ; -6.643 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.508 ; 4.482 ; ; -6.630 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.250 ; 2.727 ; ; -6.602 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.201 ; 2.748 ; ; -6.601 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.282 ; 6.389 ; ; -6.579 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.764 ; 2.924 ; ; -6.558 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.764 ; 2.903 ; ; -6.523 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.577 ; 3.055 ; ; -6.521 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.577 ; 3.053 ; ; -6.497 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.616 ; 3.598 ; ; -6.491 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.114 ; 6.016 ; ; -6.489 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.671 ; 4.504 ; ; -6.390 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.616 ; 3.491 ; ; -6.389 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.350 ; 2.386 ; ; -6.383 ; Reg8:_R2|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.942 ; 3.158 ; ; -6.383 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.755 ; 3.345 ; ; -6.376 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.429 ; 3.945 ; ; -6.376 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.510 ; 3.864 ; ; -6.318 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.184 ; 7.497 ; ; -6.274 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.404 ; 4.281 ; ; -6.270 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.942 ; 3.045 ; ; -6.258 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.647 ; 3.958 ; ; -6.257 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.573 ; 2.793 ; ; -6.246 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.438 ; 2.917 ; ; -6.214 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.755 ; 3.176 ; ; -6.212 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.755 ; 3.174 ; ; -6.207 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.236 ; 4.477 ; ; -6.207 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.352 ; 1.853 ; ; -6.198 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.306 ; 1.609 ; ; -6.186 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.252 ; 1.932 ; ; -6.163 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.508 ; 4.002 ; ; -6.160 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.942 ; 2.935 ; ; -6.158 ; Reg8:_R2|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.764 ; 2.503 ; ; -6.156 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.647 ; 3.856 ; ; -6.140 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.203 ; 1.935 ; ; -6.133 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.495 ; 2.324 ; ; -6.122 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.752 ; 4.056 ; ; -6.120 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.647 ; 3.820 ; ; -6.105 ; Reg8:_R1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.573 ; 2.641 ; ; -6.071 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.534 ; 4.120 ; ; -6.068 ; Reg8:_R2|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.764 ; 2.413 ; ; -6.057 ; Reg8:_R1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.751 ; 3.023 ; ; -6.055 ; Reg8:_R1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.573 ; 2.591 ; ; -6.046 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.308 ; 2.321 ; ; -6.040 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.317 ; 4.229 ; ; -6.029 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.184 ; 7.208 ; ; -6.008 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.459 ; 2.132 ; ; -5.999 ; Reg8:_R1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.751 ; 2.965 ; ; -5.991 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.649 ; 3.340 ; ; -5.946 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.317 ; 4.135 ; ; -5.945 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.751 ; 2.911 ; ; -5.939 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.456 ; 3.989 ; ; -5.937 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.616 ; 3.038 ; ; -5.923 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -2.078 ; 3.531 ; ; -5.877 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.508 ; 3.716 ; ; -5.872 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.485 ; 3.798 ; ; -5.839 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.357 ; 2.065 ; ; -5.830 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.593 ; 1.923 ; ; -5.826 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.643 ; 3.689 ; ; -5.788 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|17 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.184 ; 6.967 ; ; -5.770 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.456 ; 3.820 ; ; -5.768 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.456 ; 3.818 ; ; -5.760 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.185 ; 6.940 ; ; -5.746 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.184 ; 6.925 ; ; -5.737 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.891 ; 3.532 ; ; -5.729 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.184 ; 6.908 ; ; -5.728 ; Reg8:_R1|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.573 ; 2.264 ; ; -5.703 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.615 ; 3.671 ; ; -5.684 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.442 ; 1.928 ; ; -5.680 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -3.050 ; 2.136 ; ; -5.645 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.752 ; 3.579 ; ; -5.638 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.891 ; 3.433 ; ; -5.631 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|15 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.186 ; 6.812 ; ; -5.599 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.615 ; 3.567 ; ; -5.592 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.754 ; 3.421 ; ; -5.547 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.891 ; 3.342 ; ; -5.539 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.643 ; 3.402 ; ; -5.497 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.887 ; 3.296 ; ; -5.495 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_LED_OUT|13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.733 ; 7.223 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'Timing:inst1|inst' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; -8.284 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -1.645 ; 7.659 ; ; -7.979 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -0.124 ; 8.875 ; ; -5.763 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.661 ; 5.122 ; ; -5.669 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.661 ; 5.028 ; ; -5.662 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.800 ; 4.882 ; ; -5.549 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.987 ; 4.582 ; ; -5.493 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.800 ; 4.713 ; ; -5.491 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.800 ; 4.711 ; ; -5.486 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -0.062 ; 6.444 ; ; -5.458 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.140 ; 6.338 ; ; -5.364 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.140 ; 6.244 ; ; -5.357 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.279 ; 6.098 ; ; -5.343 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; 1.459 ; 7.822 ; ; -5.288 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.987 ; 4.321 ; ; -5.254 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.987 ; 4.287 ; ; -5.244 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.466 ; 5.798 ; ; -5.216 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.661 ; 4.575 ; ; -5.198 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.796 ; 4.422 ; ; -5.188 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.279 ; 5.929 ; ; -5.186 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.279 ; 5.927 ; ; -5.132 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.796 ; 4.356 ; ; -4.968 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.466 ; 5.522 ; ; -4.958 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.796 ; 4.182 ; ; -4.949 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.466 ; 5.503 ; ; -4.911 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.140 ; 5.791 ; ; -4.893 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.275 ; 5.638 ; ; -4.812 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.275 ; 5.557 ; ; -4.732 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.987 ; 3.765 ; ; -4.730 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.796 ; 3.954 ; ; -4.653 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.275 ; 5.398 ; ; -4.425 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.275 ; 5.170 ; ; -4.412 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.466 ; 4.966 ; ; -3.062 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.304 ; 2.778 ; ; -2.919 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.217 ; 4.156 ; ; -2.729 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.344 ; 2.405 ; ; -2.635 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.312 ; 2.343 ; ; -2.521 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.177 ; 3.718 ; ; -2.454 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.209 ; 3.683 ; ; -2.140 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.344 ; 1.816 ; ; -2.035 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.177 ; 3.232 ; ; -1.726 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.298 ; 1.448 ; ; -1.556 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.301 ; 1.275 ; ; -1.501 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.223 ; 2.744 ; ; -1.463 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.305 ; 1.178 ; ; -1.449 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.298 ; 1.171 ; ; -1.344 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.223 ; 2.587 ; ; -1.320 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.216 ; 2.556 ; ; -1.241 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.220 ; 2.481 ; ; -1.181 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.298 ; 0.903 ; ; -1.160 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -1.298 ; 0.882 ; ; -1.147 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.500 ; 1.232 ; 3.079 ; ; -0.986 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.500 ; 2.753 ; 4.439 ; ; -0.648 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 1.000 ; 1.232 ; 3.080 ; ; -0.431 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 1.000 ; 2.753 ; 4.384 ; ; -0.346 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.500 ; 1.232 ; 2.278 ; ; -0.138 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.500 ; 2.753 ; 3.591 ; ; 0.122 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.223 ; 1.121 ; ; 0.125 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.223 ; 1.118 ; ; 0.216 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 1.000 ; 1.232 ; 2.216 ; ; 0.456 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 1.000 ; 2.753 ; 3.497 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'Reg8:_IR|16' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; -6.609 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.611 ; 7.715 ; ; -6.329 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.651 ; 7.475 ; ; -5.910 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.741 ; 7.146 ; ; -5.717 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.742 ; 6.954 ; ; -5.642 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.611 ; 6.748 ; ; -5.616 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.613 ; 6.724 ; ; -5.582 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.659 ; 6.736 ; ; -5.538 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.613 ; 6.646 ; ; -5.463 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.661 ; 6.619 ; ; -5.459 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.661 ; 6.615 ; ; -5.458 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.659 ; 6.612 ; ; -5.424 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.611 ; 6.530 ; ; -5.407 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.613 ; 6.515 ; ; -5.387 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.743 ; 6.625 ; ; -5.372 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.659 ; 6.526 ; ; -5.325 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.613 ; 6.433 ; ; -5.303 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.659 ; 6.457 ; ; -5.295 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.741 ; 6.531 ; ; -5.230 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.742 ; 6.467 ; ; -4.668 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.743 ; 5.906 ; ; -4.645 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.194 ; 7.334 ; ; -4.539 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.742 ; 5.776 ; ; -4.369 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.234 ; 7.098 ; ; -4.251 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.676 ; 5.422 ; ; -4.204 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.196 ; 6.895 ; ; -4.183 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.325 ; 7.003 ; ; -4.170 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.242 ; 6.907 ; ; -4.088 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.595 ; 5.178 ; ; -3.994 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.595 ; 5.084 ; ; -3.987 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.456 ; 4.938 ; ; -3.975 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.716 ; 5.186 ; ; -3.969 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.326 ; 6.790 ; ; -3.946 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.324 ; 6.765 ; ; -3.941 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.244 ; 6.680 ; ; -3.931 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.196 ; 6.622 ; ; -3.915 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.194 ; 6.604 ; ; -3.896 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.242 ; 6.633 ; ; -3.889 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.194 ; 6.578 ; ; -3.874 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.269 ; 4.638 ; ; -3.818 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.456 ; 4.769 ; ; -3.816 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.456 ; 4.767 ; ; -3.808 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.196 ; 6.499 ; ; -3.808 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.635 ; 4.938 ; ; -3.795 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.676 ; 4.966 ; ; -3.791 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.196 ; 6.482 ; ; -3.769 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.242 ; 6.506 ; ; -3.759 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.324 ; 6.578 ; ; -3.736 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.244 ; 6.475 ; ; -3.728 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.242 ; 6.465 ; ; -3.714 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.635 ; 4.844 ; ; -3.709 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.138 ; 3.066 ; ; -3.707 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.496 ; 4.698 ; ; -3.616 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.726 ; 4.837 ; ; -3.594 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.309 ; 4.398 ; ; -3.591 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.678 ; 4.764 ; ; -3.579 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.269 ; 4.343 ; ; -3.552 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.806 ; 4.853 ; ; -3.541 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.595 ; 4.631 ; ; -3.538 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.496 ; 4.529 ; ; -3.536 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.496 ; 4.527 ; ; -3.523 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.460 ; 4.478 ; ; -3.511 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.724 ; 4.730 ; ; -3.500 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 2.325 ; 6.320 ; ; -3.491 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.726 ; 4.712 ; ; -3.487 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.678 ; 4.660 ; ; -3.464 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.724 ; 4.683 ; ; -3.458 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.807 ; 4.760 ; ; -3.448 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.098 ; 2.845 ; ; -3.446 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.096 ; 2.845 ; ; -3.439 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.676 ; 4.610 ; ; -3.423 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.050 ; 2.868 ; ; -3.403 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.247 ; 2.651 ; ; -3.389 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.725 ; 4.609 ; ; -3.369 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.201 ; 2.663 ; ; -3.367 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.726 ; 4.588 ; ; -3.367 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.246 ; 2.616 ; ; -3.354 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.016 ; 2.833 ; ; -3.346 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.249 ; 2.592 ; ; -3.326 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.967 ; 2.854 ; ; -3.324 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.460 ; 4.279 ; ; -3.309 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.806 ; 4.610 ; ; -3.307 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.309 ; 4.111 ; ; -3.307 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.148 ; 2.654 ; ; -3.295 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.725 ; 4.515 ; ; -3.288 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.586 ; 4.369 ; ; -3.283 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.807 ; 4.585 ; ; -3.269 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.808 ; 4.572 ; ; -3.267 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.145 ; 2.617 ; ; -3.261 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.635 ; 4.391 ; ; -3.254 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.269 ; 4.018 ; ; -3.244 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.099 ; 2.640 ; ; -3.243 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.500 ; 4.238 ; ; -3.236 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.095 ; 2.636 ; ; -3.228 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.966 ; 2.757 ; ; -3.203 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.460 ; 4.158 ; ; -3.189 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.597 ; 4.281 ; ; -3.175 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.399 ; 4.069 ; ; -3.168 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.117 ; 2.546 ; ; -3.155 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -1.199 ; 2.451 ; ; -3.124 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.595 ; 4.214 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'Timing:inst1|inst2' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; -6.297 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.420 ; 6.872 ; ; -6.266 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.015 ; 7.276 ; ; -6.259 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.451 ; 6.803 ; ; -6.171 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.420 ; 6.746 ; ; -6.086 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.199 ; 7.280 ; ; -5.926 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.458 ; 6.463 ; ; -5.900 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.115 ; 6.780 ; ; -5.892 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.018 ; 6.905 ; ; -5.871 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.015 ; 6.881 ; ; -5.858 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.115 ; 6.738 ; ; -5.833 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.115 ; 6.713 ; ; -5.805 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.458 ; 6.342 ; ; -5.770 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.018 ; 6.783 ; ; -5.728 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.420 ; 6.303 ; ; -5.708 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.015 ; 6.718 ; ; -5.696 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.018 ; 6.709 ; ; -5.687 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.199 ; 6.881 ; ; -5.577 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.015 ; 6.587 ; ; -5.525 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.199 ; 6.719 ; ; -5.458 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.458 ; 5.995 ; ; -5.393 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.199 ; 6.587 ; ; -4.847 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.132 ; 6.974 ; ; -4.453 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.598 ; 7.046 ; ; -4.444 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.163 ; 6.602 ; ; -4.424 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.468 ; 6.887 ; ; -4.337 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.163 ; 6.495 ; ; -4.329 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.125 ; 6.449 ; ; -4.324 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.355 ; 4.964 ; ; -4.302 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.598 ; 6.895 ; ; -4.299 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.468 ; 6.762 ; ; -4.294 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.601 ; 6.890 ; ; -4.269 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.782 ; 7.046 ; ; -4.196 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.125 ; 6.316 ; ; -4.183 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.163 ; 6.341 ; ; -4.179 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.601 ; 6.775 ; ; -4.162 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.601 ; 6.758 ; ; -4.152 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.468 ; 6.615 ; ; -4.122 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.782 ; 6.899 ; ; -4.109 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|15 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.386 ; 4.718 ; ; -4.084 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.160 ; 2.919 ; ; -4.046 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.311 ; 2.730 ; ; -4.036 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.598 ; 6.629 ; ; -3.981 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.598 ; 6.574 ; ; -3.979 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.393 ; 4.581 ; ; -3.954 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.083 ; 5.032 ; ; -3.943 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.355 ; 4.583 ; ; -3.927 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.050 ; 4.872 ; ; -3.924 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.125 ; 6.044 ; ; -3.908 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.080 ; 4.983 ; ; -3.884 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.209 ; 2.670 ; ; -3.866 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.280 ; 2.581 ; ; -3.861 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.080 ; 4.936 ; ; -3.852 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.782 ; 6.629 ; ; -3.827 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -2.179 ; 2.643 ; ; -3.798 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.782 ; 6.575 ; ; -3.776 ; Reg8:_R2|19 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.436 ; 4.335 ; ; -3.753 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|15 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.080 ; 4.828 ; ; -3.745 ; Reg8:_R2|19 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.001 ; 4.739 ; ; -3.741 ; Reg8:_R2|19 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.467 ; 4.269 ; ; -3.733 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|16 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.355 ; 4.373 ; ; -3.728 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.264 ; 4.987 ; ; -3.712 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.694 ; 3.013 ; ; -3.682 ; Reg8:_R2|18 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.436 ; 4.241 ; ; -3.678 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.264 ; 4.937 ; ; -3.675 ; Reg8:_R1|18 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.575 ; 4.095 ; ; -3.653 ; Reg8:_R2|19 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.436 ; 4.212 ; ; -3.652 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.845 ; 2.802 ; ; -3.651 ; Reg8:_R2|18 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.001 ; 4.645 ; ; -3.649 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -1.225 ; 2.919 ; ; -3.637 ; Reg8:_R2|18 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.467 ; 4.165 ; ; -3.630 ; Reg8:_R1|18 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.606 ; 4.019 ; ; -3.611 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -1.376 ; 2.730 ; ; -3.586 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|16 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.080 ; 4.661 ; ; -3.577 ; Reg8:_R2|19 ; Reg8:_IR|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.474 ; 4.098 ; ; -3.575 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|19 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.050 ; 4.520 ; ; -3.574 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|17 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.050 ; 4.519 ; ; -3.569 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|15 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.264 ; 4.828 ; ; -3.564 ; Reg8:_R1|18 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.060 ; 4.499 ; ; -3.562 ; Reg8:_R2|16 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.762 ; 3.795 ; ; -3.543 ; Reg8:_R2|19 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; 0.002 ; 4.540 ; ; -3.539 ; Reg8:_R2|18 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.436 ; 4.098 ; ; -3.537 ; Reg8:_R2|14 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.762 ; 3.770 ; ; -3.533 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.743 ; 2.785 ; ; -3.531 ; Reg8:_R2|16 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.327 ; 4.199 ; ; -3.531 ; Reg8:_R1|18 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.575 ; 3.951 ; ; -3.528 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.510 ; 3.013 ; ; -3.517 ; Reg8:_R2|16 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.793 ; 3.719 ; ; -3.506 ; Reg8:_R1|19 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.575 ; 3.926 ; ; -3.504 ; Reg8:_R1|17 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.575 ; 3.924 ; ; -3.491 ; Reg8:_R2|19 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; 0.257 ; 4.743 ; ; -3.470 ; Reg8:_R2|19 ; Reg8:_R2|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.057 ; 4.408 ; ; -3.470 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_R2|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.873 ; 2.592 ; ; -3.466 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.661 ; 2.800 ; ; -3.464 ; Reg8:_R1|18 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; 0.044 ; 4.503 ; ; -3.461 ; Reg8:_R1|19 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.606 ; 3.850 ; ; -3.459 ; Reg8:_R1|17 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.606 ; 3.848 ; ; -3.449 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|19 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.393 ; 4.051 ; ; -3.449 ; Reg8:_R2|19 ; Reg8:_IR|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.474 ; 3.970 ; ; -3.449 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -1.274 ; 2.670 ; ; -3.444 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|19 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.083 ; 4.522 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'Timing:inst1|inst1' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -5.949 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.184 ; 6.785 ; ; -4.278 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.399 ; 6.697 ; ; -3.970 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 1.000 ; -0.036 ; 4.954 ; ; -3.592 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.044 ; 2.568 ; ; -3.551 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.943 ; 2.628 ; ; -3.526 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.893 ; 2.653 ; ; -3.477 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.044 ; 2.453 ; ; -3.428 ; Reg8:_R2|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.200 ; 4.248 ; ; -3.347 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.942 ; 2.425 ; ; -3.334 ; Reg8:_R2|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.200 ; 4.154 ; ; -3.327 ; Reg8:_R1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.339 ; 4.008 ; ; -3.266 ; Reg8:_R2|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.526 ; 3.760 ; ; -3.214 ; Reg8:_R2|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.526 ; 3.708 ; ; -3.158 ; Reg8:_R1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.339 ; 3.839 ; ; -3.157 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.109 ; 2.568 ; ; -3.156 ; Reg8:_R1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.339 ; 3.837 ; ; -3.116 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.008 ; 2.628 ; ; -3.111 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.943 ; 2.188 ; ; -3.091 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.958 ; 2.653 ; ; -3.074 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.460 ; 3.609 ; ; -3.070 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.890 ; 2.200 ; ; -3.061 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.933 ; 2.148 ; ; -3.045 ; Reg8:_R2|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.526 ; 3.539 ; ; -3.042 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.109 ; 2.453 ; ; -3.025 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.942 ; 2.103 ; ; -2.995 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.893 ; 2.122 ; ; -2.968 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst43 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.463 ; 3.500 ; ; -2.952 ; Reg8:_R1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.335 ; 3.637 ; ; -2.940 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst45 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.463 ; 3.472 ; ; -2.932 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.463 ; 3.464 ; ; -2.926 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.042 ; 1.904 ; ; -2.912 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.007 ; 2.425 ; ; -2.905 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.942 ; 1.983 ; ; -2.881 ; Reg8:_R2|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.200 ; 3.701 ; ; -2.876 ; Reg8:_R1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.335 ; 3.561 ; ; -2.863 ; Reg8:_R1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.335 ; 3.548 ; ; -2.859 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.893 ; 1.986 ; ; -2.823 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.457 ; 3.361 ; ; -2.808 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.041 ; 1.787 ; ; -2.782 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.042 ; 1.760 ; ; -2.725 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.041 ; 1.704 ; ; -2.697 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.942 ; 1.775 ; ; -2.693 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.188 ; 3.525 ; ; -2.676 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.008 ; 2.188 ; ; -2.675 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -2.043 ; 1.652 ; ; -2.662 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.890 ; 1.792 ; ; -2.657 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.463 ; 3.189 ; ; -2.642 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.893 ; 1.769 ; ; -2.635 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.955 ; 2.200 ; ; -2.626 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.998 ; 2.148 ; ; -2.590 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.007 ; 2.103 ; ; -2.581 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.890 ; 1.711 ; ; -2.560 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.958 ; 2.122 ; ; -2.491 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.107 ; 1.904 ; ; -2.470 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.007 ; 1.983 ; ; -2.424 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.958 ; 1.986 ; ; -2.395 ; Reg8:_R1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.335 ; 3.080 ; ; -2.373 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.106 ; 1.787 ; ; -2.361 ; Reg8:_R2|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.526 ; 2.855 ; ; -2.347 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.107 ; 1.760 ; ; -2.290 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.106 ; 1.704 ; ; -2.262 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.007 ; 1.775 ; ; -2.240 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -1.108 ; 1.652 ; ; -2.227 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.955 ; 1.792 ; ; -2.218 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.511 ; 2.727 ; ; -2.207 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.958 ; 1.769 ; ; -2.146 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.955 ; 1.711 ; ; -1.952 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.511 ; 2.461 ; ; -1.643 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.513 ; 2.150 ; ; -1.615 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.511 ; 2.124 ; ; -1.587 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.511 ; 2.096 ; ; -1.547 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.513 ; 2.054 ; ; -1.345 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.511 ; 1.854 ; ; -1.065 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.515 ; 1.570 ; ; -0.658 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.517 ; 1.161 ; ; -0.557 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.517 ; 1.060 ; ; -0.416 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.515 ; 0.921 ; ; -0.387 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.515 ; 0.892 ; ; -0.379 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.515 ; 0.884 ; ; -0.365 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.515 ; 0.870 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'CLK1' ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; -0.688 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 0.500 ; 2.203 ; 3.556 ; ; -0.513 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 0.500 ; 2.203 ; 3.381 ; ; -0.446 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 0.500 ; 2.300 ; 3.411 ; ; -0.315 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 0.500 ; 2.203 ; 3.183 ; ; -0.297 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 0.500 ; 2.203 ; 3.165 ; ; -0.253 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 0.500 ; 2.203 ; 3.121 ; ; -0.226 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 0.500 ; 2.203 ; 3.094 ; ; -0.213 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 0.500 ; 2.203 ; 3.081 ; ; -0.036 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 1.000 ; 2.203 ; 3.404 ; ; -0.012 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 1.000 ; 2.203 ; 3.380 ; ; 0.116 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 1.000 ; 2.300 ; 3.349 ; ; 0.144 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 1.000 ; 2.203 ; 3.224 ; ; 0.193 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 1.000 ; 2.203 ; 3.175 ; ; 0.264 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 1.000 ; 2.203 ; 3.104 ; ; 0.271 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 1.000 ; 2.203 ; 3.097 ; ; 0.337 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 1.000 ; 2.203 ; 3.031 ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -0.107 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.882 ; 1.439 ; ; -0.096 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.714 ; 1.282 ; ; -0.089 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.149 ; 1.724 ; ; -0.059 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.674 ; 1.759 ; ; -0.049 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.676 ; 1.771 ; ; -0.049 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.835 ; 1.450 ; ; -0.018 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.013 ; 1.659 ; ; 0.072 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.012 ; 1.748 ; ; 0.076 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.674 ; 1.894 ; ; 0.094 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.204 ; 3.622 ; ; 0.119 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.905 ; 1.688 ; ; 0.141 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.973 ; 2.278 ; ; 0.169 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.206 ; 3.699 ; ; 0.169 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.907 ; 1.740 ; ; 0.172 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.673 ; 1.989 ; ; 0.183 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.845 ; 2.192 ; ; 0.210 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.674 ; 2.028 ; ; 0.220 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.206 ; 3.750 ; ; 0.239 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.573 ; 1.956 ; ; 0.267 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.204 ; 3.795 ; ; 0.269 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.204 ; 3.797 ; ; 0.275 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.882 ; 1.821 ; ; 0.279 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.204 ; 3.807 ; ; 0.293 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.840 ; 2.297 ; ; 0.310 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.845 ; 2.319 ; ; 0.319 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.842 ; 2.325 ; ; 0.326 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.204 ; 3.854 ; ; 0.342 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.673 ; 2.159 ; ; 0.344 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.905 ; 1.913 ; ; 0.377 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.249 ; 1.290 ; ; 0.378 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.927 ; 1.969 ; ; 0.387 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.975 ; 2.526 ; ; 0.397 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.574 ; 2.115 ; ; 0.397 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.882 ; 1.943 ; ; 0.415 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.525 ; 2.084 ; ; 0.434 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.524 ; 2.102 ; ; 0.434 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.572 ; 2.150 ; ; 0.448 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.523 ; 2.115 ; ; 0.482 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.199 ; 1.345 ; ; 0.483 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.882 ; 2.029 ; ; 0.483 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.907 ; 2.054 ; ; 0.484 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.907 ; 2.055 ; ; 0.488 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.842 ; 2.494 ; ; 0.488 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.575 ; 2.207 ; ; 0.493 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.522 ; 2.159 ; ; 0.495 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.661 ; 2.320 ; ; 0.495 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.245 ; 1.404 ; ; 0.507 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.116 ; 1.287 ; ; 0.510 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.204 ; 3.558 ; ; 0.517 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.149 ; 2.330 ; ; 0.530 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.905 ; 2.099 ; ; 0.534 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.661 ; 2.359 ; ; 0.537 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.882 ; 2.083 ; ; 0.573 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.907 ; 2.144 ; ; 0.574 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.845 ; 2.583 ; ; 0.576 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.974 ; 2.714 ; ; 0.576 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.206 ; 3.626 ; ; 0.583 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.905 ; 2.152 ; ; 0.587 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.565 ; 2.296 ; ; 0.588 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.149 ; 2.401 ; ; 0.599 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.841 ; 2.604 ; ; 0.603 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.661 ; 2.428 ; ; 0.610 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.975 ; 2.749 ; ; 0.615 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.206 ; 3.665 ; ; 0.660 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.907 ; 2.231 ; ; 0.682 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.842 ; 2.688 ; ; 0.699 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.204 ; 3.747 ; ; 0.711 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.575 ; 2.430 ; ; 0.712 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.798 ; 2.174 ; ; 0.713 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.907 ; 2.284 ; ; 0.717 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.204 ; 3.765 ; ; 0.717 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.204 ; 3.765 ; ; 0.720 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.013 ; 2.397 ; ; 0.722 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.842 ; 2.728 ; ; 0.724 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.117 ; 1.505 ; ; 0.739 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.873 ; 2.776 ; ; 0.745 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.882 ; 2.291 ; ; 0.754 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.882 ; 2.300 ; ; 0.757 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.975 ; 2.896 ; ; 0.762 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.740 ; 2.666 ; ; 0.763 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.204 ; 3.811 ; ; 0.777 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.674 ; 2.595 ; ; 0.779 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.149 ; 2.592 ; ; 0.788 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.246 ; 1.698 ; ; 0.788 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.574 ; 2.506 ; ; 0.788 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.149 ; 2.601 ; ; 0.789 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.845 ; 2.798 ; ; 0.791 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.012 ; 2.467 ; ; 0.802 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 1.525 ; 2.471 ; ; 0.805 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.063 ; 2.532 ; ; 0.814 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.905 ; 2.383 ; ; 0.821 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.974 ; 2.959 ; ; 0.823 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 3.503 ; 4.490 ; ; 0.823 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.905 ; 2.392 ; ; 0.847 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.199 ; 1.710 ; ; 0.848 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.117 ; 1.629 ; ; 0.862 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.284 ; 1.290 ; ; 0.873 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 3.505 ; 4.542 ; ; 0.883 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 1.200 ; 1.747 ; ; 0.886 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.821 ; 2.371 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'Timing:inst1|inst' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; 0.074 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.000 ; 2.877 ; 3.320 ; ; 0.399 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.463 ; 1.051 ; ; 0.407 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.463 ; 1.059 ; ; 0.428 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.000 ; 1.294 ; 2.091 ; ; 0.650 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; -0.500 ; 2.877 ; 3.396 ; ; 0.749 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.000 ; 2.877 ; 3.995 ; ; 0.973 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; -0.500 ; 1.294 ; 2.136 ; ; 1.009 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.000 ; 1.294 ; 2.672 ; ; 1.177 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; -0.500 ; 2.877 ; 3.923 ; ; 1.500 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; -0.500 ; 1.294 ; 2.663 ; ; 1.659 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.460 ; 2.308 ; ; 1.681 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.457 ; 2.327 ; ; 1.727 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.463 ; 2.379 ; ; 1.750 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.120 ; 0.819 ; ; 1.775 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.120 ; 0.844 ; ; 1.922 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.463 ; 2.574 ; ; 1.991 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.120 ; 1.060 ; ; 2.004 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.126 ; 1.067 ; ; 2.088 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.123 ; 1.154 ; ; 2.267 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -1.120 ; 1.336 ; ; 2.450 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.420 ; 3.059 ; ; 2.714 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.163 ; 1.740 ; ; 2.806 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.420 ; 3.415 ; ; 2.875 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.451 ; 3.515 ; ; 3.160 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.163 ; 2.186 ; ; 3.161 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.132 ; 2.218 ; ; 3.268 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.458 ; 3.915 ; ; 3.591 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.125 ; 2.655 ; ; 3.716 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.015 ; 3.890 ; ; 3.952 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 1.645 ; 5.766 ; ; 3.981 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.199 ; 3.971 ; ; 4.139 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.598 ; 2.730 ; ; 4.153 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.015 ; 4.327 ; ; 4.173 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.115 ; 4.477 ; ; 4.185 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.199 ; 4.175 ; ; 4.193 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.015 ; 4.367 ; ; 4.196 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.018 ; 4.367 ; ; 4.201 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.199 ; 4.191 ; ; 4.275 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 0.062 ; 4.506 ; ; 4.358 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.115 ; 4.662 ; ; 4.410 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.782 ; 2.817 ; ; 4.450 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.018 ; 4.621 ; ; 4.476 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.015 ; 4.650 ; ; 4.510 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.018 ; 4.681 ; ; 4.521 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.115 ; 4.825 ; ; 4.582 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.598 ; 3.173 ; ; 4.602 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.468 ; 3.323 ; ; 4.614 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.782 ; 3.021 ; ; 4.622 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.598 ; 3.213 ; ; 4.625 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.601 ; 3.213 ; ; 4.630 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.782 ; 3.037 ; ; 4.700 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.199 ; 4.690 ; ; 4.774 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.468 ; 3.495 ; ; 4.879 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.601 ; 3.467 ; ; 4.892 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.598 ; 3.483 ; ; 4.926 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.601 ; 3.514 ; ; 4.950 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.468 ; 3.671 ; ; 5.116 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.782 ; 3.523 ; ; 5.767 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 0.124 ; 6.060 ; ; 6.196 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; -1.459 ; 4.906 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'CLK1' ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; 0.177 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 0.000 ; 2.293 ; 2.824 ; ; 0.239 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 0.000 ; 2.293 ; 2.886 ; ; 0.246 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 0.000 ; 2.293 ; 2.893 ; ; 0.315 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 0.000 ; 2.293 ; 2.962 ; ; 0.455 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 0.000 ; 2.293 ; 3.102 ; ; 0.473 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 0.000 ; 2.395 ; 3.222 ; ; 0.594 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 0.000 ; 2.293 ; 3.241 ; ; 0.628 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 0.000 ; 2.293 ; 3.275 ; ; 0.750 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; -0.500 ; 2.293 ; 2.897 ; ; 0.762 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; -0.500 ; 2.293 ; 2.909 ; ; 0.789 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; -0.500 ; 2.293 ; 2.936 ; ; 0.830 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; -0.500 ; 2.293 ; 2.977 ; ; 0.915 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; -0.500 ; 2.293 ; 3.062 ; ; 1.032 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; -0.500 ; 2.395 ; 3.281 ; ; 1.089 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; -0.500 ; 2.293 ; 3.236 ; ; 1.274 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; -0.500 ; 2.293 ; 3.421 ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'Reg8:_IR|16' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; 0.862 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.284 ; 1.290 ; ; 0.967 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.234 ; 1.345 ; ; 0.980 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.280 ; 1.404 ; ; 1.087 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 1.287 ; ; 1.273 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.281 ; 1.698 ; ; 1.304 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 1.505 ; ; 1.332 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.234 ; 1.710 ; ; 1.356 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.739 ; 1.759 ; ; 1.366 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.741 ; 1.771 ; ; 1.368 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.235 ; 1.747 ; ; 1.372 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.051 ; 1.567 ; ; 1.428 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 1.629 ; ; 1.439 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.180 ; 1.763 ; ; 1.463 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.281 ; 1.888 ; ; 1.491 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.739 ; 1.894 ; ; 1.504 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.281 ; 1.929 ; ; 1.567 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.002 ; 1.713 ; ; 1.576 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.038 ; 2.278 ; ; 1.587 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.738 ; 1.989 ; ; 1.608 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 1.809 ; ; 1.618 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.910 ; 2.192 ; ; 1.622 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.183 ; 1.949 ; ; 1.625 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.739 ; 2.028 ; ; 1.628 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.051 ; 1.823 ; ; 1.631 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 1.831 ; ; 1.642 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.002 ; 1.788 ; ; 1.652 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 1.852 ; ; 1.654 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.638 ; 1.956 ; ; 1.661 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.183 ; 1.988 ; ; 1.686 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 1.887 ; ; 1.708 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.000 ; 1.852 ; ; 1.720 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.085 ; 1.949 ; ; 1.728 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.905 ; 2.297 ; ; 1.729 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 1.929 ; ; 1.742 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.053 ; 1.939 ; ; 1.745 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.910 ; 2.319 ; ; 1.754 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.907 ; 2.325 ; ; 1.757 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.738 ; 2.159 ; ; 1.812 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.639 ; 2.115 ; ; 1.818 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.180 ; 2.142 ; ; 1.822 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.040 ; 2.526 ; ; 1.824 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.085 ; 2.053 ; ; 1.829 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.051 ; 2.024 ; ; 1.830 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.590 ; 2.084 ; ; 1.849 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.002 ; 1.995 ; ; 1.849 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.589 ; 2.102 ; ; 1.849 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.637 ; 2.150 ; ; 1.863 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.588 ; 2.115 ; ; 1.881 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 2.082 ; ; 1.891 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.173 ; 2.208 ; ; 1.903 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.640 ; 2.207 ; ; 1.908 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.587 ; 2.159 ; ; 1.912 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 2.113 ; ; 1.913 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 2.113 ; ; 1.923 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.907 ; 2.494 ; ; 1.926 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.180 ; 2.250 ; ; 1.930 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.726 ; 2.320 ; ; 1.934 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.231 ; 2.309 ; ; 1.934 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.236 ; 2.314 ; ; 1.941 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.241 ; 2.326 ; ; 1.944 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.085 ; 2.173 ; ; 1.945 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.043 ; 2.132 ; ; 1.969 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.726 ; 2.359 ; ; 2.002 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.630 ; 2.296 ; ; 2.003 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 2.204 ; ; 2.009 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.910 ; 2.583 ; ; 2.011 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.039 ; 2.714 ; ; 2.014 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 2.215 ; ; 2.034 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.906 ; 2.604 ; ; 2.038 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.726 ; 2.428 ; ; 2.045 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.040 ; 2.749 ; ; 2.085 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.080 ; 2.309 ; ; 2.101 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 2.301 ; ; 2.101 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.051 ; 2.296 ; ; 2.117 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.907 ; 2.688 ; ; 2.126 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.640 ; 2.430 ; ; 2.157 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.907 ; 2.728 ; ; 2.166 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.282 ; 2.592 ; ; 2.174 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.938 ; 2.776 ; ; 2.183 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 2.384 ; ; 2.184 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.085 ; 2.413 ; ; 2.187 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 2.387 ; ; 2.191 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 2.391 ; ; 2.192 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.040 ; 2.896 ; ; 2.192 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.739 ; 2.595 ; ; 2.196 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.570 ; 1.290 ; ; 2.197 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.805 ; 2.666 ; ; 2.203 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.639 ; 2.506 ; ; 2.217 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.590 ; 2.471 ; ; 2.224 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.910 ; 2.798 ; ; 2.242 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.057 ; 2.443 ; ; 2.256 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 1.039 ; 2.959 ; ; 2.258 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; -0.500 ; 2.568 ; 4.490 ; ; 2.300 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.000 ; 2.444 ; ; 2.301 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.620 ; 1.345 ; ; 2.304 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.280 ; 2.728 ; ; 2.305 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.080 ; 2.529 ; ; 2.306 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.234 ; 2.684 ; ; 2.306 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.002 ; 2.448 ; ; 2.306 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.056 ; 2.506 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'Timing:inst1|inst1' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.875 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.249 ; 0.815 ; ; 0.887 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.249 ; 0.827 ; ; 0.896 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.249 ; 0.836 ; ; 0.921 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.249 ; 0.861 ; ; 1.073 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.250 ; 1.012 ; ; 1.168 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.251 ; 1.106 ; ; 1.570 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.249 ; 1.510 ; ; 1.771 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.245 ; 1.715 ; ; 1.915 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.246 ; 1.858 ; ; 1.950 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.245 ; 1.894 ; ; 1.984 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.245 ; 1.928 ; ; 2.004 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.247 ; 1.946 ; ; 2.103 ; Reg8:_R1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.076 ; 2.216 ; ; 2.190 ; Reg8:_R2|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.260 ; 2.119 ; ; 2.323 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.245 ; 2.267 ; ; 2.362 ; Reg8:_R1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.076 ; 2.475 ; ; 2.394 ; Reg8:_R2|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.260 ; 2.323 ; ; 2.395 ; Reg8:_R2|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.260 ; 2.324 ; ; 2.402 ; Reg8:_R1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.076 ; 2.515 ; ; 2.435 ; Reg8:_R2|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.054 ; 2.678 ; ; 2.458 ; Reg8:_R1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.079 ; 2.568 ; ; 2.487 ; Reg8:_R1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.079 ; 2.597 ; ; 2.543 ; Reg8:_R2|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.054 ; 2.786 ; ; 2.552 ; Reg8:_R2|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.054 ; 2.795 ; ; 2.583 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.803 ; 1.469 ; ; 2.612 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.672 ; 1.629 ; ; 2.625 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.245 ; 2.569 ; ; 2.627 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.674 ; 1.642 ; ; 2.652 ; Reg8:_R1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.076 ; 2.765 ; ; 2.664 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.802 ; 1.551 ; ; 2.691 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.672 ; 1.708 ; ; 2.695 ; Reg8:_R1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.079 ; 2.805 ; ; 2.715 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.803 ; 1.601 ; ; 2.735 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.720 ; 1.704 ; ; 2.744 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.802 ; 1.631 ; ; 2.857 ; Reg8:_R2|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.260 ; 2.786 ; ; 2.878 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.720 ; 1.847 ; ; 2.892 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.674 ; 1.907 ; ; 2.903 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.803 ; 1.789 ; ; 2.967 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.687 ; 1.469 ; ; 2.996 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.556 ; 1.629 ; ; 3.011 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.558 ; 1.642 ; ; 3.013 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.674 ; 2.028 ; ; 3.014 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.720 ; 1.983 ; ; 3.044 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.059 ; 3.292 ; ; 3.048 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.686 ; 1.551 ; ; 3.071 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.223 ; 3.012 ; ; 3.071 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.672 ; 2.088 ; ; 3.075 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.556 ; 1.708 ; ; 3.078 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.712 ; 2.055 ; ; 3.099 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.687 ; 1.601 ; ; 3.110 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.584 ; 4.883 ; ; 3.119 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.604 ; 1.704 ; ; 3.121 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.722 ; 2.088 ; ; 3.128 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.686 ; 1.631 ; ; 3.227 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.216 ; 3.175 ; ; 3.262 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.604 ; 1.847 ; ; 3.273 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.720 ; 2.242 ; ; 3.276 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.558 ; 1.907 ; ; 3.287 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.687 ; 1.789 ; ; 3.353 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.223 ; 3.294 ; ; 3.362 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst45 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.223 ; 3.303 ; ; 3.397 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst43 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.223 ; 3.338 ; ; 3.397 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.558 ; 2.028 ; ; 3.398 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.604 ; 1.983 ; ; 3.412 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.804 ; 2.297 ; ; 3.455 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.556 ; 2.088 ; ; 3.462 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.596 ; 2.055 ; ; 3.503 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.220 ; 3.447 ; ; 3.505 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.674 ; 2.520 ; ; 3.505 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.606 ; 2.088 ; ; 3.550 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.804 ; 2.435 ; ; 3.552 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.722 ; 2.519 ; ; 3.604 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 0.000 ; 0.044 ; 3.817 ; ; 3.657 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.604 ; 2.242 ; ; 3.796 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.688 ; 2.297 ; ; 3.889 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.558 ; 2.520 ; ; 3.934 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.688 ; 2.435 ; ; 3.936 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -1.606 ; 2.519 ; ; 4.021 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.063 ; 4.273 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'Timing:inst1|inst2' ; +-------+----------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; 1.861 ; Reg8:_AR_BUSIN3|13 ; Reg8:_R2|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.158 ; 2.183 ; ; 1.891 ; Reg8:_AR_BUSIN3|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.158 ; 2.213 ; ; 1.968 ; Reg8:_AR_BUSIN3|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.156 ; 2.288 ; ; 2.036 ; Reg8:_AR_BUSIN3|17 ; Reg8:_IR|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.525 ; 1.675 ; ; 2.047 ; Reg8:_AR_BUSIN3|13 ; Reg8:_R1|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.033 ; 2.178 ; ; 2.082 ; Reg8:_AR_BUSIN3|16 ; Reg8:_R1|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.033 ; 2.213 ; ; 2.115 ; Reg8:_AR_BUSIN3|13 ; Reg8:_IR|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.485 ; 1.794 ; ; 2.161 ; Reg8:_AR_BUSIN3|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.035 ; 2.290 ; ; 2.185 ; Reg8:_AR_BUSIN3|18 ; Reg8:_R2|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.169 ; 2.180 ; ; 2.201 ; Reg8:_AR_BUSIN3|17 ; Reg8:_R1|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.029 ; 2.336 ; ; 2.217 ; Reg8:_R1|13 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 2.688 ; ; 2.223 ; Reg8:_AR_BUSIN3|18 ; Reg8:_R1|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.030 ; 2.357 ; ; 2.242 ; Reg8:_AR_BUSIN3|14 ; Reg8:_R2|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.158 ; 2.564 ; ; 2.261 ; Reg8:_AR_BUSIN3|16 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.485 ; 1.940 ; ; 2.281 ; Reg8:_AR_BUSIN3|18 ; Reg8:_IR|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.526 ; 1.919 ; ; 2.345 ; Reg8:_AR_BUSIN3|17 ; Reg8:_R2|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.168 ; 2.341 ; ; 2.432 ; Reg8:_AR_BUSIN3|14 ; Reg8:_R1|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.033 ; 2.563 ; ; 2.483 ; Reg8:_R1|13 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.056 ; 2.683 ; ; 2.498 ; Reg8:_R1|13 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.316 ; 2.326 ; ; 2.501 ; Reg8:_R1|17 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.324 ; 2.969 ; ; 2.514 ; Reg8:_R1|15 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 2.985 ; ; 2.521 ; Reg8:_AR_BUSIN3|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.519 ; 2.166 ; ; 2.583 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R2|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.269 ; 1.978 ; ; 2.587 ; Reg8:_R1|15 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 3.058 ; ; 2.593 ; Reg8:_R1|17 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.359 ; 2.378 ; ; 2.626 ; Reg8:_AR_BUSIN3|19 ; Reg8:_R1|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.029 ; 2.761 ; ; 2.631 ; Reg8:_R1|14 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 3.102 ; ; 2.636 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_R2|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.399 ; 1.901 ; ; 2.641 ; Reg8:_R1|16 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 3.112 ; ; 2.650 ; Reg8:_R1|17 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.324 ; 3.118 ; ; 2.652 ; Reg8:_R2|17 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.383 ; 3.179 ; ; 2.658 ; Reg8:_R2|17 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.226 ; 2.576 ; ; 2.680 ; Reg8:_AR_BUSIN3|19 ; Reg8:_IR|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.525 ; 2.319 ; ; 2.687 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_R2|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.269 ; 2.082 ; ; 2.688 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_R2|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.269 ; 2.083 ; ; 2.758 ; Reg8:_R1|16 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 3.229 ; ; 2.761 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_R2|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.399 ; 2.026 ; ; 2.762 ; Reg8:_AR_BUSIN3|19 ; Reg8:_R2|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.168 ; 2.758 ; ; 2.769 ; Reg8:_R2|17 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.266 ; 3.179 ; ; 2.771 ; Reg8:_R1|18 ; Reg8:_R2|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.002 ; 2.913 ; ; 2.772 ; Reg8:_R1|17 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.053 ; 2.969 ; ; 2.773 ; Reg8:_R2|18 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.270 ; 3.187 ; ; 2.774 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R1|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.460 ; 1.978 ; ; 2.784 ; Reg8:_R1|15 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.056 ; 2.984 ; ; 2.788 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.083 ; 1.369 ; ; 2.792 ; Reg8:_R2|17 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.383 ; 3.319 ; ; 2.794 ; Reg8:_R1|16 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 3.265 ; ; 2.803 ; Reg8:_R1|17 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.324 ; 3.271 ; ; 2.814 ; Reg8:_R2|13 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.069 ; 3.027 ; ; 2.821 ; Reg8:_R2|18 ; Reg8:_IR|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.226 ; 2.739 ; ; 2.822 ; Reg8:_R2|18 ; Reg8:_R2|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.057 ; 3.023 ; ; 2.823 ; Reg8:_R2|17 ; Reg8:_R1|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.270 ; 3.237 ; ; 2.827 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_R1|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.590 ; 1.901 ; ; 2.838 ; Reg8:_R1|17 ; Reg8:_R1|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.057 ; 3.039 ; ; 2.843 ; Reg8:_R2|16 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.069 ; 3.056 ; ; 2.844 ; Reg8:_R1|18 ; Reg8:_IR|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.359 ; 2.629 ; ; 2.845 ; Reg8:_R1|15 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 3.316 ; ; 2.860 ; Reg8:_R1|15 ; Reg8:_R1|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.056 ; 3.060 ; ; 2.866 ; Reg8:_R2|19 ; Reg8:_R1|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.270 ; 3.280 ; ; 2.868 ; Reg8:_R1|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.319 ; 2.693 ; ; 2.873 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_R1|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.460 ; 2.077 ; ; 2.876 ; Reg8:_R1|18 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.057 ; 3.077 ; ; 2.876 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_R2|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.726 ; 1.814 ; ; 2.878 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_R1|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.460 ; 2.082 ; ; 2.879 ; Reg8:_R1|18 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.324 ; 3.347 ; ; 2.892 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_R2|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.597 ; 1.959 ; ; 2.895 ; Reg8:_R2|19 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.383 ; 3.422 ; ; 2.897 ; Reg8:_R1|14 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.056 ; 3.097 ; ; 2.900 ; Reg8:_R2|15 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.069 ; 3.113 ; ; 2.901 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_R1|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.587 ; 1.978 ; ; 2.902 ; Reg8:_R1|17 ; Reg8:_R2|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.002 ; 3.044 ; ; 2.903 ; Reg8:_R1|14 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.316 ; 2.731 ; ; 2.904 ; Reg8:_AR_BUSIN3|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.485 ; 2.583 ; ; 2.905 ; Reg8:_R1|14 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.327 ; 3.376 ; ; 2.908 ; Reg8:_R2|17 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.266 ; 3.318 ; ; 2.911 ; Reg8:_R1|16 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.056 ; 3.111 ; ; 2.911 ; Reg8:_R2|19 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.226 ; 2.829 ; ; 2.920 ; Reg8:_R1|17 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.053 ; 3.117 ; ; 2.920 ; Reg8:_R2|19 ; Reg8:_IR|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.226 ; 2.838 ; ; 2.926 ; Reg8:_R2|13 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.048 ; 3.022 ; ; 2.930 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_R1|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.458 ; 2.136 ; ; 2.939 ; Reg8:_R2|16 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.069 ; 3.152 ; ; 2.940 ; Reg8:_R2|18 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.383 ; 3.467 ; ; 2.945 ; Reg8:_R2|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.186 ; 2.903 ; ; 2.945 ; Reg8:_R2|17 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.383 ; 3.472 ; ; 2.948 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_R1|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.590 ; 2.022 ; ; 2.949 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.083 ; 1.530 ; ; 2.950 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.912 ; 1.702 ; ; 2.956 ; Reg8:_R2|18 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.226 ; 2.874 ; ; 2.956 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_IR|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.912 ; 1.708 ; ; 2.960 ; Reg8:_R2|16 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.048 ; 3.056 ; ; 2.967 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -1.153 ; 1.978 ; ; 2.970 ; Reg8:_R1|18 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.359 ; 2.755 ; ; 2.973 ; Reg8:_R1|19 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.324 ; 3.441 ; ; 2.989 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_R1|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.587 ; 2.066 ; ; 3.000 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_R2|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.643 ; 2.021 ; ; 3.002 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|18 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.954 ; 1.712 ; ; 3.003 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.042 ; 1.625 ; ; 3.008 ; Reg8:_R2|14 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.069 ; 3.221 ; ; 3.008 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -1.042 ; 1.630 ; +-------+----------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Recovery: 'Timing:inst1|inst1' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -7.972 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.460 ; 8.507 ; ; -5.506 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.126 ; 7.627 ; ; -5.451 ; Reg8:_R2|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.476 ; 5.970 ; ; -5.357 ; Reg8:_R2|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.476 ; 5.876 ; ; -5.350 ; Reg8:_R1|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.615 ; 5.730 ; ; -5.237 ; Reg8:_R2|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.802 ; 5.430 ; ; -5.181 ; Reg8:_R1|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.615 ; 5.561 ; ; -5.179 ; Reg8:_R1|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.615 ; 5.559 ; ; -4.987 ; Reg8:_R2|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.802 ; 5.180 ; ; -4.950 ; Reg8:_R2|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.802 ; 5.143 ; ; -4.904 ; Reg8:_R2|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.476 ; 5.423 ; ; -4.886 ; Reg8:_R1|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.611 ; 5.270 ; ; -4.831 ; Reg8:_R1|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.611 ; 5.215 ; ; -4.810 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.120 ; 6.925 ; ; -4.650 ; Reg8:_R1|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.611 ; 5.034 ; ; -4.624 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.120 ; 6.739 ; ; -4.546 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 1.123 ; 6.664 ; ; -4.431 ; Reg8:_R2|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.802 ; 4.624 ; ; -4.408 ; Reg8:_R1|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.611 ; 4.792 ; ; -3.082 ; Reg8:_IR|17 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.116 ; 3.961 ; ; -2.701 ; Reg8:_IR|14 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.162 ; 3.534 ; ; -2.625 ; Reg8:_IR|15 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.124 ; 3.496 ; ; -2.019 ; Reg8:_IR|13 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.162 ; 2.852 ; ; -1.024 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.414 ; 4.113 ; ; -0.970 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.414 ; 4.059 ; ; -0.861 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.420 ; 3.956 ; ; -0.846 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 2.417 ; 3.938 ; ; -0.541 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.414 ; 4.130 ; ; -0.453 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.414 ; 4.042 ; ; -0.414 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.420 ; 4.009 ; ; -0.326 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 2.417 ; 3.918 ; ; -0.318 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; 2.414 ; 3.407 ; ; 0.226 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 1.000 ; 2.414 ; 3.363 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Recovery: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -2.185 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.848 ; 5.028 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; -0.330 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 3.142 ; 4.147 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; ; 0.118 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 3.142 ; 4.199 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Removal: 'Timing:inst1|inst1' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.354 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.000 ; 2.530 ; 3.228 ; ; 0.812 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.533 ; 3.689 ; ; 0.863 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.537 ; 3.744 ; ; 0.893 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; 2.530 ; 3.267 ; ; 0.983 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.530 ; 3.857 ; ; 1.045 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 2.530 ; 3.919 ; ; 1.282 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.533 ; 3.659 ; ; 1.308 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.537 ; 3.689 ; ; 1.476 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.530 ; 3.850 ; ; 1.535 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 2.530 ; 3.909 ; ; 2.456 ; Reg8:_IR|13 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.073 ; 2.693 ; ; 3.006 ; Reg8:_IR|15 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.111 ; 3.281 ; ; 3.086 ; Reg8:_IR|14 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.073 ; 3.323 ; ; 3.399 ; Reg8:_IR|17 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.118 ; 3.681 ; ; 3.696 ; Reg8:_R1|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.359 ; 3.501 ; ; 3.967 ; Reg8:_R2|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.543 ; 3.588 ; ; 4.063 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.305 ; 5.532 ; ; 4.139 ; Reg8:_R1|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.359 ; 3.944 ; ; 4.159 ; Reg8:_R2|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.229 ; 4.094 ; ; 4.171 ; Reg8:_R2|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.543 ; 3.792 ; ; 4.179 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.301 ; 5.644 ; ; 4.179 ; Reg8:_R1|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.359 ; 3.984 ; ; 4.182 ; Reg8:_R1|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.362 ; 3.984 ; ; 4.187 ; Reg8:_R2|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.543 ; 3.808 ; ; 4.331 ; Reg8:_R2|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.229 ; 4.266 ; ; 4.370 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.298 ; 5.832 ; ; 4.436 ; Reg8:_R1|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.362 ; 4.238 ; ; 4.449 ; Reg8:_R1|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.359 ; 4.254 ; ; 4.483 ; Reg8:_R1|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.362 ; 4.285 ; ; 4.507 ; Reg8:_R2|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.229 ; 4.442 ; ; 4.569 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.298 ; 6.031 ; ; 4.673 ; Reg8:_R2|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.543 ; 4.294 ; ; 5.733 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.220 ; 5.677 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Removal: 'Timing:inst1|inst3' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.417 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 3.290 ; 4.031 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 0.842 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 3.290 ; 3.976 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; ; 2.300 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.058 ; 4.522 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ---------------------------------------------- ; Slow 1200mV 0C Model Metastability Summary ; ---------------------------------------------- No synchronizer chains to report. +---------------------------------------------+ ; Fast 1200mV 0C Model Setup Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst3 ; -5.648 ; -130.812 ; ; Timing:inst1|inst ; -4.633 ; -9.089 ; ; Reg8:_IR|16 ; -3.801 ; -65.416 ; ; Timing:inst1|inst2 ; -3.464 ; -65.864 ; ; Timing:inst1|inst1 ; -3.191 ; -12.724 ; ; CLK1 ; -0.565 ; -1.821 ; +--------------------+--------+---------------+ +---------------------------------------------+ ; Fast 1200mV 0C Model Hold Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst ; -0.099 ; -0.099 ; ; Timing:inst1|inst3 ; -0.073 ; -0.170 ; ; CLK1 ; 0.225 ; 0.000 ; ; Reg8:_IR|16 ; 0.468 ; 0.000 ; ; Timing:inst1|inst1 ; 0.514 ; 0.000 ; ; Timing:inst1|inst2 ; 1.045 ; 0.000 ; +--------------------+--------+---------------+ +---------------------------------------------+ ; Fast 1200mV 0C Model Recovery Summary ; +--------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+---------------+ ; Timing:inst1|inst1 ; -4.445 ; -12.251 ; ; Timing:inst1|inst3 ; -0.762 ; -6.096 ; +--------------------+--------+---------------+ +--------------------------------------------+ ; Fast 1200mV 0C Model Removal Summary ; +--------------------+-------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+-------+---------------+ ; Timing:inst1|inst1 ; 0.142 ; 0.000 ; ; Timing:inst1|inst3 ; 0.197 ; 0.000 ; +--------------------+-------+---------------+ +--------------------------------------------------+ ; Fast 1200mV 0C Model Minimum Pulse Width Summary ; +--------------------+--------+--------------------+ ; Clock ; Slack ; End Point TNS ; +--------------------+--------+--------------------+ ; CLK1 ; -3.000 ; -8.746 ; ; Timing:inst1|inst3 ; -1.000 ; -43.000 ; ; Reg8:_IR|16 ; -1.000 ; -21.000 ; ; Timing:inst1|inst2 ; -1.000 ; -21.000 ; ; Timing:inst1|inst1 ; -1.000 ; -9.000 ; ; Timing:inst1|inst ; -1.000 ; -2.000 ; +--------------------+--------+--------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Setup: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -5.648 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.913 ; 3.618 ; ; -5.330 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.959 ; 4.134 ; ; -5.313 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.035 ; 3.602 ; ; -5.134 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.959 ; 3.698 ; ; -4.914 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.827 ; 3.951 ; ; -4.912 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.121 ; 3.775 ; ; -4.761 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -1.037 ; 3.647 ; ; -4.748 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.951 ; 3.604 ; ; -4.507 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.157 ; 3.547 ; ; -4.387 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -0.806 ; 2.464 ; ; -4.269 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.111 ; 4.143 ; ; -4.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.035 ; 3.513 ; ; -4.131 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.890 ; 2.124 ; ; -4.104 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -0.928 ; 2.500 ; ; -4.066 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.111 ; 3.700 ; ; -4.038 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.890 ; 2.031 ; ; -4.016 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.936 ; 2.843 ; ; -4.013 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.951 ; 1.945 ; ; -4.002 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -2.057 ; 1.269 ; ; -3.982 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.085 ; 1.780 ; ; -3.953 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.085 ; 1.751 ; ; -3.933 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.959 ; 1.298 ; ; -3.920 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.951 ; 1.852 ; ; -3.893 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.012 ; 2.205 ; ; -3.893 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.951 ; 1.825 ; ; -3.882 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.871 ; 1.774 ; ; -3.880 ; Reg8:_R2|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.207 ; 1.997 ; ; -3.871 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.882 ; 1.752 ; ; -3.861 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; -0.051 ; 3.794 ; ; -3.825 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.012 ; 2.137 ; ; -3.820 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.936 ; 2.407 ; ; -3.810 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -0.852 ; 2.721 ; ; -3.800 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.073 ; 2.051 ; ; -3.788 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.033 ; 3.744 ; ; -3.769 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.207 ; 1.886 ; ; -3.767 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.890 ; 1.760 ; ; -3.753 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.981 ; 1.535 ; ; -3.747 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.997 ; 2.513 ; ; -3.737 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.949 ; 1.671 ; ; -3.729 ; Reg8:_R2|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.085 ; 1.527 ; ; -3.713 ; Reg8:_R2|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.085 ; 1.511 ; ; -3.707 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.073 ; 1.958 ; ; -3.697 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.936 ; 2.524 ; ; -3.685 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.997 ; 2.451 ; ; -3.680 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.073 ; 1.931 ; ; -3.680 ; Reg8:_R1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.071 ; 1.933 ; ; -3.677 ; Reg8:_R1|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.949 ; 1.611 ; ; -3.672 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.997 ; 2.438 ; ; -3.661 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.207 ; 1.778 ; ; -3.633 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.243 ; 3.740 ; ; -3.619 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.944 ; 0.999 ; ; -3.616 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.981 ; 1.158 ; ; -3.615 ; Reg8:_R1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.949 ; 1.549 ; ; -3.598 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.098 ; 2.484 ; ; -3.596 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -1.014 ; 2.566 ; ; -3.593 ; Reg8:_R1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.071 ; 1.846 ; ; -3.582 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.500 ; 0.119 ; 3.508 ; ; -3.567 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -0.852 ; 2.238 ; ; -3.559 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.871 ; 1.211 ; ; -3.554 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.012 ; 1.866 ; ; -3.551 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.804 ; 2.611 ; ; -3.551 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.997 ; 2.077 ; ; -3.550 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.882 ; 1.191 ; ; -3.547 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.936 ; 2.374 ; ; -3.534 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -2.045 ; 1.473 ; ; -3.524 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.071 ; 1.777 ; ; -3.523 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -2.059 ; 1.387 ; ; -3.507 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.949 ; 1.481 ; ; -3.494 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.293 ; 2.185 ; ; -3.474 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -0.844 ; 2.437 ; ; -3.452 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.804 ; 2.512 ; ; -3.451 ; Reg8:_R1|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.949 ; 1.385 ; ; -3.434 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.928 ; 2.313 ; ; -3.411 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -0.720 ; 2.555 ; ; -3.410 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.865 ; 2.409 ; ; -3.382 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.500 ; -0.930 ; 2.375 ; ; -3.372 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.048 ; 4.407 ; ; -3.370 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.999 ; 2.235 ; ; -3.353 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -2.141 ; 1.196 ; ; -3.341 ; Reg8:_R2|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.014 ; 2.250 ; ; -3.341 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.960 ; 1.304 ; ; -3.329 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.159 ; 2.154 ; ; -3.313 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.865 ; 2.312 ; ; -3.308 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.865 ; 2.307 ; ; -3.281 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.098 ; 2.167 ; ; -3.273 ; Reg8:_R2|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.014 ; 2.182 ; ; -3.254 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.159 ; 2.079 ; ; -3.248 ; Reg8:_R1|18 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.075 ; 2.096 ; ; -3.247 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 0.048 ; 4.282 ; ; -3.247 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -2.030 ; 1.201 ; ; -3.232 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.159 ; 2.057 ; ; -3.225 ; Reg8:_R1|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.157 ; 2.052 ; ; -3.220 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.739 ; 1.345 ; ; -3.217 ; Reg8:_R2|16 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.209 ; 1.931 ; ; -3.205 ; Reg8:_R2|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.999 ; 2.070 ; ; -3.196 ; Reg8:_AR_BUSIN3|14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; -1.174 ; 1.346 ; ; -3.165 ; Reg8:_R1|19 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.989 ; 1.983 ; ; -3.160 ; Reg8:_R2|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -0.804 ; 2.220 ; ; -3.155 ; Reg8:_R1|17 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.075 ; 2.003 ; ; -3.133 ; Reg8:_R1|15 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.500 ; -1.073 ; 1.983 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Setup: 'Timing:inst1|inst' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; -4.633 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -1.113 ; 4.529 ; ; -4.456 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -0.085 ; 5.380 ; ; -3.270 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.090 ; 3.189 ; ; -3.171 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.090 ; 3.090 ; ; -3.129 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.151 ; 2.987 ; ; -3.093 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.062 ; 4.040 ; ; -3.089 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.285 ; 2.813 ; ; -3.032 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.151 ; 2.890 ; ; -3.027 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.151 ; 2.885 ; ; -3.010 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.285 ; 2.734 ; ; -2.994 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.062 ; 3.941 ; ; -2.952 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.123 ; 3.838 ; ; -2.924 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.285 ; 2.648 ; ; -2.912 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.257 ; 3.664 ; ; -2.879 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.090 ; 2.798 ; ; -2.877 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.149 ; 2.737 ; ; -2.855 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.123 ; 3.741 ; ; -2.851 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.149 ; 2.711 ; ; -2.850 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.123 ; 3.736 ; ; -2.844 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; -0.043 ; 3.810 ; ; -2.833 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.257 ; 3.585 ; ; -2.810 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.149 ; 2.670 ; ; -2.747 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.257 ; 3.499 ; ; -2.725 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 1.000 ; 0.985 ; 4.719 ; ; -2.702 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.062 ; 3.649 ; ; -2.697 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.121 ; 3.585 ; ; -2.674 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.121 ; 3.562 ; ; -2.651 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.285 ; 2.375 ; ; -2.637 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -1.149 ; 2.497 ; ; -2.633 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.121 ; 3.521 ; ; -2.474 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.257 ; 3.226 ; ; -2.460 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.121 ; 3.348 ; ; -1.557 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.767 ; 1.799 ; ; -1.438 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.261 ; 2.708 ; ; -1.328 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.794 ; 1.543 ; ; -1.269 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.782 ; 1.496 ; ; -1.202 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.234 ; 2.445 ; ; -1.150 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.246 ; 2.405 ; ; -0.976 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; -0.794 ; 1.191 ; ; -0.953 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 1.000 ; 0.234 ; 2.196 ; ; -0.755 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -0.824 ; 0.940 ; ; -0.629 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.204 ; 1.842 ; ; -0.625 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -0.826 ; 0.808 ; ; -0.624 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.500 ; 0.757 ; 1.995 ; ; -0.577 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.500 ; 1.785 ; 2.976 ; ; -0.560 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -0.827 ; 0.742 ; ; -0.543 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -0.818 ; 0.734 ; ; -0.520 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.210 ; 1.739 ; ; -0.448 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.202 ; 1.659 ; ; -0.441 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.201 ; 1.651 ; ; -0.397 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -0.818 ; 0.588 ; ; -0.381 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; -0.818 ; 0.572 ; ; -0.097 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.500 ; 0.757 ; 1.468 ; ; 0.029 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.500 ; 1.785 ; 2.370 ; ; 0.085 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 1.000 ; 0.757 ; 1.786 ; ; 0.256 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 1.000 ; 1.785 ; 2.643 ; ; 0.487 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.210 ; 0.732 ; ; 0.490 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 1.000 ; 0.210 ; 0.729 ; ; 0.559 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 1.000 ; 0.757 ; 1.312 ; ; 0.792 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 1.000 ; 1.785 ; 2.107 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Setup: 'Reg8:_IR|16' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; -3.801 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.300 ; 4.588 ; ; -3.659 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.304 ; 4.450 ; ; -3.325 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.401 ; 4.213 ; ; -3.301 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.403 ; 4.191 ; ; -3.212 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.300 ; 3.999 ; ; -3.205 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.303 ; 3.995 ; ; -3.186 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.315 ; 3.988 ; ; -3.122 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.315 ; 3.924 ; ; -3.117 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.315 ; 3.919 ; ; -3.113 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.303 ; 3.903 ; ; -3.099 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.303 ; 3.889 ; ; -3.096 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.315 ; 3.898 ; ; -3.079 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.315 ; 3.881 ; ; -3.046 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.303 ; 3.836 ; ; -3.045 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.300 ; 3.832 ; ; -3.035 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.403 ; 3.925 ; ; -3.027 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.315 ; 3.829 ; ; -2.944 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.401 ; 3.832 ; ; -2.909 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.403 ; 3.799 ; ; -2.571 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.403 ; 3.461 ; ; -2.524 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 0.403 ; 3.414 ; ; -2.520 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.370 ; 4.377 ; ; -2.438 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.323 ; 3.248 ; ; -2.378 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.374 ; 4.239 ; ; -2.339 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.323 ; 3.149 ; ; -2.298 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.407 ; 3.192 ; ; -2.297 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.262 ; 3.046 ; ; -2.296 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.327 ; 3.110 ; ; -2.257 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.128 ; 2.872 ; ; -2.240 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.473 ; 4.200 ; ; -2.232 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.373 ; 4.092 ; ; -2.213 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.385 ; 4.085 ; ; -2.200 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.262 ; 2.949 ; ; -2.197 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.327 ; 3.011 ; ; -2.195 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.262 ; 2.944 ; ; -2.156 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.411 ; 3.054 ; ; -2.155 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.266 ; 2.908 ; ; -2.115 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.132 ; 2.734 ; ; -2.107 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.612 ; 1.982 ; ; -2.092 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.128 ; 2.707 ; ; -2.066 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.385 ; 3.938 ; ; -2.062 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.473 ; 4.022 ; ; -2.058 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.266 ; 2.811 ; ; -2.053 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.370 ; 3.910 ; ; -2.053 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.266 ; 2.806 ; ; -2.047 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.323 ; 2.857 ; ; -2.044 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.471 ; 4.002 ; ; -2.031 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.373 ; 3.891 ; ; -2.019 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.264 ; 2.770 ; ; -2.011 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.385 ; 3.883 ; ; -2.003 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.407 ; 2.897 ; ; -1.994 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.370 ; 3.851 ; ; -1.987 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.426 ; 2.900 ; ; -1.985 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.373 ; 3.845 ; ; -1.967 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.719 ; 1.735 ; ; -1.966 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.385 ; 3.838 ; ; -1.965 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.608 ; 1.844 ; ; -1.963 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.385 ; 3.835 ; ; -1.962 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.424 ; 2.873 ; ; -1.951 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.609 ; 1.829 ; ; -1.950 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.132 ; 2.569 ; ; -1.948 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.707 ; 1.728 ; ; -1.947 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.373 ; 3.807 ; ; -1.932 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.597 ; 1.822 ; ; -1.930 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.385 ; 3.802 ; ; -1.913 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.422 ; 2.822 ; ; -1.909 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.720 ; 1.676 ; ; -1.906 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.128 ; 2.521 ; ; -1.905 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.327 ; 2.719 ; ; -1.901 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.722 ; 1.666 ; ; -1.895 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.264 ; 2.646 ; ; -1.893 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst ; Reg8:_IR|16 ; 0.500 ; 1.471 ; 3.851 ; ; -1.877 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.268 ; 2.632 ; ; -1.863 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.424 ; 2.774 ; ; -1.853 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.509 ; 1.831 ; ; -1.842 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.520 ; 1.809 ; ; -1.839 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.410 ; 2.736 ; ; -1.832 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.624 ; 1.695 ; ; -1.828 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.264 ; 2.579 ; ; -1.826 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.410 ; 2.723 ; ; -1.822 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.422 ; 2.731 ; ; -1.822 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.508 ; 2.817 ; ; -1.821 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.363 ; 2.671 ; ; -1.811 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.707 ; 1.591 ; ; -1.807 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.422 ; 2.716 ; ; -1.806 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.609 ; 1.684 ; ; -1.805 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.264 ; 2.556 ; ; -1.803 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.338 ; 2.628 ; ; -1.802 ; Reg8:_R2|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.128 ; 2.417 ; ; -1.801 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.422 ; 2.710 ; ; -1.799 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.326 ; 2.612 ; ; -1.797 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.619 ; 1.665 ; ; -1.792 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.323 ; 2.602 ; ; -1.785 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.326 ; 2.598 ; ; -1.785 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.326 ; 2.598 ; ; -1.785 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.620 ; 1.652 ; ; -1.782 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.338 ; 2.607 ; ; -1.781 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0.500 ; 0.510 ; 2.778 ; ; -1.781 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0.500 ; 0.229 ; 2.497 ; ; -1.781 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0.500 ; -0.509 ; 1.759 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Setup: 'Timing:inst1|inst2' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; -3.464 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.401 ; 4.050 ; ; -3.411 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.390 ; 4.008 ; ; -3.392 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.390 ; 3.989 ; ; -3.340 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.052 ; 4.275 ; ; -3.212 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.081 ; 4.280 ; ; -3.209 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.416 ; 3.780 ; ; -3.184 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.416 ; 3.755 ; ; -3.181 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.107 ; 4.061 ; ; -3.153 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.050 ; 4.090 ; ; -3.134 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.052 ; 4.069 ; ; -3.127 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.107 ; 4.007 ; ; -3.127 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.050 ; 4.064 ; ; -3.121 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.107 ; 4.001 ; ; -3.081 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.390 ; 3.678 ; ; -3.059 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.050 ; 3.996 ; ; -3.021 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.052 ; 3.956 ; ; -3.001 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.081 ; 4.069 ; ; -2.985 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.416 ; 3.556 ; ; -2.953 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R1|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; -0.052 ; 3.888 ; ; -2.889 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.081 ; 3.957 ; ; -2.820 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_R2|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.081 ; 3.888 ; ; -2.491 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.669 ; 4.147 ; ; -2.233 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.680 ; 3.900 ; ; -2.226 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.423 ; 1.790 ; ; -2.220 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -0.917 ; 1.790 ; ; -2.210 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.313 ; 1.884 ; ; -2.204 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -0.807 ; 1.884 ; ; -2.183 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.283 ; 2.887 ; ; -2.161 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.018 ; 4.166 ; ; -2.130 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.680 ; 3.797 ; ; -2.116 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.654 ; 3.757 ; ; -2.113 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.963 ; 4.063 ; ; -2.085 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|15 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.294 ; 2.778 ; ; -2.081 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.412 ; 1.656 ; ; -2.075 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -0.906 ; 1.656 ; ; -2.060 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.963 ; 4.010 ; ; -2.059 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.020 ; 4.066 ; ; -2.059 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.018 ; 4.064 ; ; -2.048 ; Reg8:_R2|19 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.367 ; 2.668 ; ; -2.044 ; Reg8:_R2|19 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.378 ; 2.653 ; ; -2.044 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.324 ; 1.707 ; ; -2.042 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.654 ; 3.683 ; ; -2.038 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -0.818 ; 1.707 ; ; -2.030 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.680 ; 3.697 ; ; -2.028 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.151 ; 4.166 ; ; -2.012 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.314 ; 1.685 ; ; -2.006 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -0.808 ; 1.685 ; ; -1.998 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.020 ; 4.005 ; ; -1.987 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.020 ; 3.994 ; ; -1.977 ; Reg8:_R2|19 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.029 ; 2.935 ; ; -1.976 ; Reg8:_R2|18 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.378 ; 2.585 ; ; -1.972 ; Reg8:_R2|19 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.367 ; 2.592 ; ; -1.961 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.963 ; 3.911 ; ; -1.959 ; Reg8:_R2|14 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.562 ; 2.384 ; ; -1.951 ; Reg8:_R1|18 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.439 ; 2.499 ; ; -1.949 ; Reg8:_R2|18 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.367 ; 2.569 ; ; -1.934 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.309 ; 2.612 ; ; -1.931 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.151 ; 4.069 ; ; -1.924 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 0.654 ; 3.565 ; ; -1.920 ; Reg8:_R2|16 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.573 ; 2.334 ; ; -1.908 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.283 ; 2.612 ; ; -1.907 ; Reg8:_R1|18 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.428 ; 2.466 ; ; -1.904 ; Reg8:_R2|18 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.367 ; 2.524 ; ; -1.902 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.018 ; 3.907 ; ; -1.896 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -1.074 ; 1.809 ; ; -1.895 ; Reg8:_R2|19 ; Reg8:_IR|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.393 ; 2.489 ; ; -1.890 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_R1|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -0.568 ; 1.809 ; ; -1.880 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -0.964 ; 1.903 ; ; -1.879 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.057 ; 2.923 ; ; -1.879 ; Reg8:_R1|18 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.428 ; 2.438 ; ; -1.878 ; Reg8:_R2|18 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.029 ; 2.836 ; ; -1.874 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_R1|15 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0.500 ; -0.458 ; 1.903 ; ; -1.870 ; Reg8:_R2|19 ; Reg8:_IR|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.393 ; 2.464 ; ; -1.867 ; Reg8:_R2|16 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.562 ; 2.292 ; ; -1.862 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.018 ; 3.867 ; ; -1.858 ; Reg8:_R1|17 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.439 ; 2.406 ; ; -1.853 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R2|18 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.000 ; 2.840 ; ; -1.848 ; Reg8:_R2|16 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.562 ; 2.273 ; ; -1.839 ; Reg8:_R2|19 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.027 ; 2.799 ; ; -1.837 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|13 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.055 ; 2.879 ; ; -1.836 ; Reg8:_R1|15 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.437 ; 2.386 ; ; -1.831 ; Reg8:_R1|19 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.439 ; 2.379 ; ; -1.820 ; Reg8:_R2|19 ; Reg8:_R2|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.037 ; 2.770 ; ; -1.813 ; Reg8:_R2|19 ; Reg8:_R1|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.027 ; 2.773 ; ; -1.812 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_R1|14 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; 0.055 ; 2.854 ; ; -1.810 ; Reg8:_R1|19 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.428 ; 2.369 ; ; -1.807 ; Reg8:_R2|15 ; Reg8:_IR|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.573 ; 2.221 ; ; -1.805 ; Reg8:_R1|17 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.428 ; 2.364 ; ; -1.802 ; Reg8:_R2|19 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; 0.151 ; 2.940 ; ; -1.796 ; Reg8:_R2|16 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.224 ; 2.559 ; ; -1.786 ; Reg8:_R1|17 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.428 ; 2.345 ; ; -1.785 ; Reg8:_R1|18 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.039 ; 2.733 ; ; -1.769 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1.000 ; 1.151 ; 3.907 ; ; -1.767 ; Reg8:_R2|19 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.367 ; 2.387 ; ; -1.766 ; Reg8:_R2|19 ; Reg8:_R2|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.037 ; 2.716 ; ; -1.765 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Reg8:_IR|16 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 1.000 ; -0.283 ; 2.469 ; ; -1.763 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 1.000 ; -0.941 ; 1.809 ; ; -1.760 ; Reg8:_R2|19 ; Reg8:_R2|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.037 ; 2.710 ; ; -1.759 ; Reg8:_R1|14 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.426 ; 2.320 ; ; -1.759 ; Reg8:_R1|19 ; Reg8:_IR|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 1.000 ; -0.428 ; 2.318 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Setup: 'Timing:inst1|inst1' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -3.191 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.186 ; 4.014 ; ; -2.082 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 0.884 ; 3.975 ; ; -1.930 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 1.000 ; -0.027 ; 2.912 ; ; -1.880 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.208 ; 1.681 ; ; -1.874 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.702 ; 1.681 ; ; -1.817 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.208 ; 1.618 ; ; -1.811 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.702 ; 1.618 ; ; -1.811 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.110 ; 1.710 ; ; -1.805 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.604 ; 1.710 ; ; -1.801 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.098 ; 1.712 ; ; -1.795 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.592 ; 1.712 ; ; -1.789 ; Reg8:_R2|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.163 ; 2.635 ; ; -1.758 ; Reg8:_R2|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.358 ; 2.409 ; ; -1.703 ; Reg8:_R2|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.163 ; 2.549 ; ; -1.678 ; Reg8:_R1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.224 ; 2.463 ; ; -1.647 ; Reg8:_R2|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.358 ; 2.298 ; ; -1.635 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.109 ; 1.535 ; ; -1.629 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.603 ; 1.535 ; ; -1.585 ; Reg8:_R1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.224 ; 2.370 ; ; -1.558 ; Reg8:_R1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.224 ; 2.343 ; ; -1.558 ; Reg8:_R1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.222 ; 2.345 ; ; -1.539 ; Reg8:_R2|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.358 ; 2.190 ; ; -1.506 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.110 ; 1.405 ; ; -1.500 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.604 ; 1.405 ; ; -1.497 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.095 ; 1.411 ; ; -1.491 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.589 ; 1.411 ; ; -1.471 ; Reg8:_R1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.222 ; 2.258 ; ; -1.458 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.098 ; 1.369 ; ; -1.452 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.592 ; 1.369 ; ; -1.433 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.098 ; 1.344 ; ; -1.432 ; Reg8:_R2|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.163 ; 2.278 ; ; -1.427 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.592 ; 1.344 ; ; -1.422 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.109 ; 1.322 ; ; -1.416 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.603 ; 1.322 ; ; -1.414 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.361 ; 2.040 ; ; -1.405 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.208 ; 1.206 ; ; -1.402 ; Reg8:_R1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.222 ; 2.189 ; ; -1.399 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.702 ; 1.206 ; ; -1.397 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst43 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.368 ; 2.016 ; ; -1.379 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst45 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.368 ; 1.998 ; ; -1.374 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.368 ; 1.993 ; ; -1.348 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.098 ; 1.259 ; ; -1.342 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.592 ; 1.259 ; ; -1.339 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.109 ; 1.239 ; ; -1.333 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.603 ; 1.239 ; ; -1.325 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.206 ; 1.128 ; ; -1.319 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.700 ; 1.128 ; ; -1.304 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.208 ; 1.105 ; ; -1.298 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.702 ; 1.105 ; ; -1.277 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.359 ; 1.905 ; ; -1.260 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.206 ; 1.063 ; ; -1.254 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.700 ; 1.063 ; ; -1.239 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.209 ; 1.039 ; ; -1.233 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.703 ; 1.039 ; ; -1.219 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.095 ; 1.133 ; ; -1.213 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.589 ; 1.133 ; ; -1.213 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.109 ; 1.113 ; ; -1.207 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.603 ; 1.113 ; ; -1.180 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.098 ; 1.091 ; ; -1.174 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.592 ; 1.091 ; ; -1.158 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.363 ; 1.782 ; ; -1.157 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -1.095 ; 1.071 ; ; -1.156 ; Reg8:_R1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.222 ; 1.943 ; ; -1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.189 ; 1.974 ; ; -1.153 ; Reg8:_R2|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.358 ; 1.804 ; ; -1.151 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; -0.589 ; 1.071 ; ; -1.074 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.325 ; 1.758 ; ; -0.866 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.325 ; 1.550 ; ; -0.670 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.326 ; 1.353 ; ; -0.639 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.325 ; 1.323 ; ; -0.624 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.325 ; 1.308 ; ; -0.596 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.326 ; 1.279 ; ; -0.493 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.325 ; 1.177 ; ; -0.380 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.328 ; 1.061 ; ; -0.096 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.329 ; 0.776 ; ; -0.012 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.329 ; 0.692 ; ; 0.078 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.328 ; 0.603 ; ; 0.101 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.328 ; 0.580 ; ; 0.104 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.328 ; 0.577 ; ; 0.113 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; -0.328 ; 0.568 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Setup: 'CLK1' ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; -0.565 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 0.500 ; 1.297 ; 2.444 ; ; -0.469 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 0.500 ; 1.297 ; 2.348 ; ; -0.394 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 0.500 ; 1.351 ; 2.327 ; ; -0.274 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 0.500 ; 1.297 ; 2.153 ; ; -0.119 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 0.500 ; 1.297 ; 1.998 ; ; -0.085 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 0.500 ; 1.297 ; 1.964 ; ; -0.074 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 0.500 ; 1.297 ; 1.953 ; ; -0.060 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 0.500 ; 1.297 ; 1.939 ; ; 0.242 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 1.000 ; 1.297 ; 2.137 ; ; 0.316 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 1.000 ; 1.297 ; 2.063 ; ; 0.384 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 1.000 ; 1.351 ; 2.049 ; ; 0.388 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 1.000 ; 1.297 ; 1.991 ; ; 0.427 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 1.000 ; 1.297 ; 1.952 ; ; 0.433 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 1.000 ; 1.297 ; 1.946 ; ; 0.439 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 1.000 ; 1.297 ; 1.940 ; ; 0.447 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 1.000 ; 1.297 ; 1.932 ; +--------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'Timing:inst1|inst' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ ; -0.099 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.000 ; 1.870 ; 2.000 ; ; 0.122 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.368 ; 0.614 ; ; 0.124 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.368 ; 0.616 ; ; 0.208 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; 0.000 ; 0.800 ; 1.237 ; ; 0.242 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.000 ; 1.870 ; 2.341 ; ; 0.533 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; 0.000 ; 0.800 ; 1.562 ; ; 0.648 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; -0.500 ; 1.870 ; 2.247 ; ; 0.852 ; Reg8:_IR|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst ; -0.500 ; 0.800 ; 1.381 ; ; 0.929 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.361 ; 1.414 ; ; 0.935 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.359 ; 1.418 ; ; 0.985 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.368 ; 1.477 ; ; 1.032 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; -0.500 ; 1.870 ; 2.631 ; ; 1.058 ; uARReg:inst2|inst45 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -0.702 ; 0.480 ; ; 1.068 ; uARReg:inst2|inst43 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -0.702 ; 0.490 ; ; 1.075 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; 0.363 ; 1.562 ; ; 1.207 ; uARReg:inst2|inst42~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -0.702 ; 0.629 ; ; 1.226 ; uARReg:inst2|inst40~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -0.711 ; 0.639 ; ; 1.230 ; Timing:inst1|inst3 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst ; -0.500 ; 0.800 ; 1.759 ; ; 1.275 ; uARReg:inst2|inst44~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -0.709 ; 0.690 ; ; 1.357 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.390 ; 1.871 ; ; 1.382 ; uARReg:inst2|inst41~_emulated ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst ; 0.000 ; -0.707 ; 0.799 ; ; 1.540 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.401 ; 2.065 ; ; 1.546 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.390 ; 2.060 ; ; 1.579 ; Reg8:_IR|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.680 ; 1.023 ; ; 1.786 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.416 ; 2.326 ; ; 1.831 ; Reg8:_IR|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.669 ; 1.286 ; ; 1.853 ; Reg8:_IR|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.680 ; 1.297 ; ; 2.077 ; Reg8:_IR|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.654 ; 1.547 ; ; 2.092 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 1.113 ; 3.309 ; ; 2.198 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.052 ; 2.374 ; ; 2.378 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.081 ; 2.421 ; ; 2.383 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 0.043 ; 2.530 ; ; 2.443 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.052 ; 2.619 ; ; 2.455 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.050 ; 2.629 ; ; 2.469 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.107 ; 2.700 ; ; 2.477 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.081 ; 2.520 ; ; 2.491 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.081 ; 2.534 ; ; 2.505 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.052 ; 2.681 ; ; 2.544 ; Reg8:_R1|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.018 ; 1.650 ; ; 2.587 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.107 ; 2.818 ; ; 2.619 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.050 ; 2.793 ; ; 2.627 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.052 ; 2.803 ; ; 2.652 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.050 ; 2.826 ; ; 2.680 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; 0.107 ; 2.911 ; ; 2.724 ; Reg8:_R2|13 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.151 ; 1.697 ; ; 2.776 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.081 ; 2.819 ; ; 2.789 ; Reg8:_R1|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.018 ; 1.895 ; ; 2.801 ; Reg8:_R1|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.020 ; 1.905 ; ; 2.815 ; Reg8:_R2|18 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.963 ; 1.976 ; ; 2.823 ; Reg8:_R2|14 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.151 ; 1.796 ; ; 2.837 ; Reg8:_R2|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.151 ; 1.810 ; ; 2.851 ; Reg8:_R1|15 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.018 ; 1.957 ; ; 2.933 ; Reg8:_R2|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.963 ; 2.094 ; ; 2.965 ; Reg8:_R1|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.020 ; 2.069 ; ; 2.973 ; Reg8:_R1|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.018 ; 2.079 ; ; 2.998 ; Reg8:_R1|19 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.020 ; 2.102 ; ; 3.026 ; Reg8:_R2|17 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -0.963 ; 2.187 ; ; 3.122 ; Reg8:_R2|16 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst ; 0.000 ; -1.151 ; 2.095 ; ; 3.325 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; 0.085 ; 3.514 ; ; 3.671 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Timing:inst1|inst ; Timing:inst1|inst ; 0.000 ; -0.985 ; 2.790 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------+--------------------+-------------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -0.073 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.009 ; 2.125 ; ; -0.037 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.010 ; 2.162 ; ; -0.026 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.974 ; 1.032 ; ; -0.026 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.974 ; 1.032 ; ; -0.008 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.010 ; 2.191 ; ; 0.028 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.009 ; 2.226 ; ; 0.031 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.009 ; 2.229 ; ; 0.041 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.009 ; 2.239 ; ; 0.052 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.973 ; 1.109 ; ; 0.065 ; Timing:inst1|inst3 ; Reg8:_AR_BUSIN3|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.009 ; 2.263 ; ; 0.099 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.972 ; 1.155 ; ; 0.119 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.074 ; 1.297 ; ; 0.120 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.973 ; 1.177 ; ; 0.124 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.129 ; 1.357 ; ; 0.157 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.107 ; 0.868 ; ; 0.168 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[6]~8 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 0.983 ; 0.755 ; ; 0.174 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.191 ; 0.969 ; ; 0.175 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.277 ; 1.056 ; ; 0.189 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.072 ; 1.365 ; ; 0.191 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.972 ; 1.247 ; ; 0.192 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.873 ; 1.149 ; ; 0.196 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[7] ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.069 ; 0.869 ; ; 0.212 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.072 ; 1.388 ; ; 0.215 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.074 ; 1.393 ; ; 0.218 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.135 ; 2.457 ; ; 0.264 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[4]~10 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.193 ; 1.061 ; ; 0.267 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.864 ; 1.215 ; ; 0.269 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.135 ; 2.508 ; ; 0.271 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.875 ; 1.230 ; ; 0.273 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.862 ; 1.219 ; ; 0.288 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.863 ; 1.235 ; ; 0.291 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.129 ; 1.524 ; ; 0.291 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.874 ; 1.249 ; ; 0.302 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.861 ; 1.247 ; ; 0.309 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.028 ; ; 0.320 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.941 ; 1.365 ; ; 0.322 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.072 ; 1.498 ; ; 0.334 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.053 ; ; 0.348 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.876 ; 1.308 ; ; 0.358 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.074 ; 1.536 ; ; 0.364 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.107 ; 1.075 ; ; 0.371 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.941 ; 1.416 ; ; 0.396 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.115 ; ; 0.402 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.864 ; 1.350 ; ; 0.417 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[5]~9 ; Reg8:_AR_BUSIN3|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.174 ; 1.195 ; ; 0.418 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.073 ; 1.595 ; ; 0.418 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.941 ; 1.463 ; ; 0.422 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.129 ; 1.655 ; ; 0.422 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 0.722 ; 0.748 ; ; 0.432 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.130 ; 1.666 ; ; 0.434 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.072 ; 1.610 ; ; 0.441 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.072 ; 1.617 ; ; 0.450 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.107 ; 1.161 ; ; 0.451 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 0.000 ; 1.211 ; 1.766 ; ; 0.466 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.074 ; 1.644 ; ; 0.468 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.129 ; 1.701 ; ; 0.468 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.196 ; 0.748 ; ; 0.468 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.876 ; 1.428 ; ; 0.473 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.192 ; ; 0.476 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.974 ; 1.534 ; ; 0.477 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 0.719 ; 0.800 ; ; 0.480 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.199 ; ; 0.484 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 0.707 ; 0.795 ; ; 0.487 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.136 ; 2.727 ; ; 0.495 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.864 ; 1.443 ; ; 0.498 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.875 ; 1.457 ; ; 0.506 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.107 ; 1.217 ; ; 0.508 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.277 ; 1.389 ; ; 0.521 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; -0.500 ; 0.619 ; 0.744 ; ; 0.523 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.193 ; 0.800 ; ; 0.530 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.181 ; 0.795 ; ; 0.538 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.257 ; ; 0.549 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.107 ; 1.260 ; ; 0.551 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[3]~11 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.277 ; 1.432 ; ; 0.558 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.973 ; 1.635 ; ; 0.562 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.861 ; 1.507 ; ; 0.563 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.072 ; 1.739 ; ; 0.565 ; Reg8:_AR_BUSIN3|18 ; Reg8:_LED_OUT|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.503 ; 1.152 ; ; 0.566 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.285 ; ; 0.571 ; Reg8:_AR_BUSIN3|15 ; Reg8:_LED_OUT|15 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.504 ; 1.159 ; ; 0.572 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.030 ; 1.706 ; ; 0.577 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.070 ; 1.751 ; ; 0.581 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[2]~12 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.300 ; ; 0.588 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.130 ; 1.822 ; ; 0.588 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.861 ; 1.533 ; ; 0.594 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.135 ; 2.833 ; ; 0.595 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.962 ; 1.661 ; ; 0.599 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.973 ; 1.676 ; ; 0.601 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.072 ; 1.777 ; ; 0.604 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 1.074 ; 1.782 ; ; 0.604 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[1]~13 ; Reg8:_AR_BUSIN3|18 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.091 ; 1.299 ; ; 0.607 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.133 ; 2.844 ; ; 0.613 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.976 ; 1.693 ; ; 0.614 ; Reg8:_AR_BUSIN3|16 ; Reg8:_LED_OUT|16 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.505 ; 1.203 ; ; 0.619 ; Reg8:_AR_BUSIN3|17 ; Reg8:_LED_OUT|17 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.507 ; 1.210 ; ; 0.622 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|latch_signal[0]~14 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 1.115 ; 1.341 ; ; 0.624 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 0.036 ; 0.744 ; ; 0.625 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 0.000 ; 0.964 ; 1.693 ; ; 0.627 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.036 ; 2.767 ; ; 0.628 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 2.133 ; 2.865 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +-----------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'CLK1' ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ ; 0.225 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; 0.000 ; 1.354 ; 1.798 ; ; 0.238 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; 0.000 ; 1.354 ; 1.811 ; ; 0.245 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; 0.000 ; 1.354 ; 1.818 ; ; 0.282 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; 0.000 ; 1.354 ; 1.855 ; ; 0.294 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; 0.000 ; 1.354 ; 1.867 ; ; 0.343 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; 0.000 ; 1.410 ; 1.972 ; ; 0.407 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; 0.000 ; 1.354 ; 1.980 ; ; 0.482 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; 0.000 ; 1.354 ; 2.055 ; ; 0.754 ; Timing:inst1|inst3 ; Timing:inst1|inst ; Timing:inst1|inst3 ; CLK1 ; -0.500 ; 1.354 ; 1.827 ; ; 0.767 ; Timing:inst1|inst2 ; Timing:inst1|inst ; Timing:inst1|inst2 ; CLK1 ; -0.500 ; 1.354 ; 1.840 ; ; 0.778 ; Timing:inst1|inst1 ; Timing:inst1|inst ; Timing:inst1|inst1 ; CLK1 ; -0.500 ; 1.354 ; 1.851 ; ; 0.811 ; Timing:inst1|inst ; Timing:inst1|inst ; Timing:inst1|inst ; CLK1 ; -0.500 ; 1.354 ; 1.884 ; ; 0.998 ; Timing:inst1|inst3 ; Timing:inst1|inst4 ; Timing:inst1|inst3 ; CLK1 ; -0.500 ; 1.354 ; 2.071 ; ; 1.109 ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; CLK1 ; -0.500 ; 1.410 ; 2.238 ; ; 1.174 ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; CLK1 ; -0.500 ; 1.354 ; 2.247 ; ; 1.277 ; Timing:inst1|inst ; Timing:inst1|inst1 ; Timing:inst1|inst ; CLK1 ; -0.500 ; 1.354 ; 2.350 ; +-------+--------------------+--------------------+--------------------+-------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'Reg8:_IR|16' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ ; 0.468 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.196 ; 0.748 ; ; 0.523 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.193 ; 0.800 ; ; 0.530 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.181 ; 0.795 ; ; 0.624 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 0.744 ; ; 0.715 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.194 ; 0.993 ; ; 0.718 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.181 ; 0.983 ; ; 0.733 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.182 ; 0.999 ; ; 0.762 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.037 ; 0.883 ; ; 0.825 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.194 ; 1.103 ; ; 0.825 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 0.945 ; ; 0.836 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.194 ; 1.114 ; ; 0.845 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.006 ; 0.923 ; ; 0.855 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.094 ; 1.033 ; ; 0.919 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.039 ; ; 0.926 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.017 ; 0.993 ; ; 0.945 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.065 ; ; 0.954 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.071 ; 1.109 ; ; 0.956 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.076 ; ; 0.960 ; Reg8:_AR_BUSIN3|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.468 ; 1.032 ; ; 0.960 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.468 ; 1.032 ; ; 0.962 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.098 ; 1.144 ; ; 0.981 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.017 ; 1.048 ; ; 0.983 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.103 ; ; 0.985 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.006 ; 1.063 ; ; 0.993 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.098 ; 1.175 ; ; 0.994 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.114 ; ; 1.010 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.018 ; 1.076 ; ; 1.038 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.467 ; 1.109 ; ; 1.047 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.094 ; 1.225 ; ; 1.051 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.071 ; 1.206 ; ; 1.056 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.003 ; 1.137 ; ; 1.063 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.190 ; 1.337 ; ; 1.068 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.179 ; 1.331 ; ; 1.085 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.466 ; 1.155 ; ; 1.088 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.017 ; 1.155 ; ; 1.091 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.211 ; ; 1.091 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.006 ; 1.169 ; ; 1.100 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.220 ; ; 1.103 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.223 ; ; 1.106 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.467 ; 1.177 ; ; 1.109 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.094 ; 1.287 ; ; 1.111 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.071 ; 1.266 ; ; 1.112 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.181 ; 1.377 ; ; 1.125 ; Reg8:_R1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.568 ; 1.297 ; ; 1.128 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.086 ; 1.298 ; ; 1.130 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.623 ; 1.357 ; ; 1.152 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.272 ; ; 1.161 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.281 ; ; 1.177 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.466 ; 1.247 ; ; 1.178 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.367 ; 1.149 ; ; 1.179 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.068 ; 1.331 ; ; 1.191 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.015 ; 1.260 ; ; 1.195 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.566 ; 1.365 ; ; 1.218 ; Reg8:_R1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.566 ; 1.388 ; ; 1.221 ; Reg8:_R1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.568 ; 1.393 ; ; 1.224 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst ; Reg8:_IR|16 ; -0.500 ; 1.629 ; 2.457 ; ; 1.234 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.193 ; 1.511 ; ; 1.247 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.367 ; ; 1.253 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.358 ; 1.215 ; ; 1.257 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.369 ; 1.230 ; ; 1.258 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.037 ; 1.379 ; ; 1.259 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.379 ; ; 1.259 ; Reg8:_AR_BUSIN3|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.356 ; 1.219 ; ; 1.262 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.005 ; 1.341 ; ; 1.271 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.037 ; 1.392 ; ; 1.274 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.357 ; 1.235 ; ; 1.275 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst ; Reg8:_IR|16 ; -0.500 ; 1.629 ; 2.508 ; ; 1.277 ; Reg8:_AR_BUSIN3|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.368 ; 1.249 ; ; 1.280 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.071 ; 1.435 ; ; 1.288 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.355 ; 1.247 ; ; 1.297 ; Reg8:_R2|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.623 ; 1.524 ; ; 1.306 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.068 ; 1.458 ; ; 1.314 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.193 ; 1.591 ; ; 1.320 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.181 ; 1.585 ; ; 1.326 ; Reg8:_R2|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.435 ; 1.365 ; ; 1.328 ; Reg8:_R1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.566 ; 1.498 ; ; 1.329 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.449 ; ; 1.334 ; Reg8:_AR_BUSIN3|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.370 ; 1.308 ; ; 1.356 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.020 ; 1.420 ; ; 1.361 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.481 ; ; 1.364 ; Reg8:_R1|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.568 ; 1.536 ; ; 1.370 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.017 ; 1.437 ; ; 1.373 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.006 ; 1.451 ; ; 1.377 ; Reg8:_R2|16 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.435 ; 1.416 ; ; 1.377 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; -0.018 ; 1.443 ; ; 1.388 ; Reg8:_AR_BUSIN3|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.358 ; 1.350 ; ; 1.405 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.094 ; 1.583 ; ; 1.409 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.265 ; 0.748 ; ; 1.412 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.532 ; ; 1.424 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.567 ; 1.595 ; ; 1.424 ; Reg8:_R2|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.435 ; 1.463 ; ; 1.428 ; Reg8:_R2|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.623 ; 1.655 ; ; 1.438 ; Reg8:_R2|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.624 ; 1.666 ; ; 1.440 ; Reg8:_R1|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.566 ; 1.610 ; ; 1.447 ; Reg8:_R1|18 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; Timing:inst1|inst2 ; Reg8:_IR|16 ; -0.500 ; 0.566 ; 1.617 ; ; 1.449 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0.000 ; 0.036 ; 1.569 ; ; 1.454 ; Reg8:_AR_BUSIN3|14 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.370 ; 1.428 ; ; 1.457 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst1 ; Reg8:_IR|16 ; -0.500 ; 0.705 ; 1.766 ; ; 1.462 ; Reg8:_AR_BUSIN3|17 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; 0.468 ; 1.534 ; ; 1.464 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; Timing:inst1|inst3 ; Reg8:_IR|16 ; -0.500 ; -0.268 ; 0.800 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------+-------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'Timing:inst1|inst1' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.514 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.155 ; 0.483 ; ; 0.520 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.155 ; 0.489 ; ; 0.527 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.155 ; 0.496 ; ; 0.538 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.155 ; 0.507 ; ; 0.629 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.157 ; 0.596 ; ; 0.688 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.156 ; 0.656 ; ; 0.933 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_address_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.155 ; 0.902 ; ; 1.021 ; Reg8:_AR_BUSIN3|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.153 ; 0.992 ; ; 1.117 ; Reg8:_AR_BUSIN3|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.155 ; 1.086 ; ; 1.137 ; Reg8:_AR_BUSIN3|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.153 ; 1.108 ; ; 1.162 ; Reg8:_AR_BUSIN3|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.153 ; 1.133 ; ; 1.172 ; Reg8:_AR_BUSIN3|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.154 ; 1.142 ; ; 1.263 ; Reg8:_R1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.053 ; 1.334 ; ; 1.332 ; Reg8:_R2|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.186 ; 1.270 ; ; 1.356 ; Reg8:_AR_BUSIN3|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.153 ; 1.327 ; ; 1.405 ; Reg8:_R1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.053 ; 1.476 ; ; 1.441 ; Reg8:_R1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.053 ; 1.512 ; ; 1.458 ; Reg8:_R2|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.186 ; 1.396 ; ; 1.467 ; Reg8:_R2|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.186 ; 1.405 ; ; 1.485 ; Reg8:_R1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.055 ; 1.554 ; ; 1.503 ; Reg8:_R1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.055 ; 1.572 ; ; 1.517 ; Reg8:_R2|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.002 ; 1.643 ; ; 1.526 ; Reg8:_R2|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.002 ; 1.652 ; ; 1.537 ; Reg8:_R2|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.002 ; 1.663 ; ; 1.543 ; Reg8:_AR_BUSIN3|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.153 ; 1.514 ; ; 1.570 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 1.008 ; 2.702 ; ; 1.591 ; Reg8:_R1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.055 ; 1.660 ; ; 1.608 ; Reg8:_R1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.053 ; 1.679 ; ; 1.702 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.886 ; 0.940 ; ; 1.707 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.204 ; 1.607 ; ; 1.721 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.405 ; 0.940 ; ; 1.725 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.989 ; 0.860 ; ; 1.728 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.022 ; 1.830 ; ; 1.735 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.889 ; 0.970 ; ; 1.744 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.508 ; 0.860 ; ; 1.753 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.901 ; 0.976 ; ; 1.754 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.408 ; 0.970 ; ; 1.755 ; Reg8:_R2|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.186 ; 1.693 ; ; 1.762 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.886 ; 1.000 ; ; 1.765 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.987 ; 0.902 ; ; 1.772 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|18 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.420 ; 0.976 ; ; 1.781 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.405 ; 1.000 ; ; 1.784 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.506 ; 0.902 ; ; 1.806 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.989 ; 0.941 ; ; 1.813 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.201 ; 1.716 ; ; 1.825 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.508 ; 0.941 ; ; 1.825 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.987 ; 0.962 ; ; 1.844 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.506 ; 0.962 ; ; 1.860 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.889 ; 1.095 ; ; 1.867 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.901 ; 1.090 ; ; 1.879 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.408 ; 1.095 ; ; 1.886 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.420 ; 1.090 ; ; 1.897 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.210 ; 1.791 ; ; 1.898 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst45 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.210 ; 1.792 ; ; 1.904 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.989 ; 1.039 ; ; 1.912 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst43 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.210 ; 1.806 ; ; 1.923 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|19 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.508 ; 1.039 ; ; 1.925 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_we_reg ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 0.000 ; 0.032 ; 2.061 ; ; 1.930 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.889 ; 1.165 ; ; 1.936 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.901 ; 1.159 ; ; 1.940 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.890 ; 1.174 ; ; 1.948 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.202 ; 1.850 ; ; 1.949 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.408 ; 1.165 ; ; 1.955 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|17 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.420 ; 1.159 ; ; 1.959 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|13 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.409 ; 1.174 ; ; 1.992 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.886 ; 1.230 ; ; 1.994 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.901 ; 1.217 ; ; 2.011 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.405 ; 1.230 ; ; 2.013 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|16 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.420 ; 1.217 ; ; 2.119 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.901 ; 1.342 ; ; 2.138 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.420 ; 1.342 ; ; 2.209 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.989 ; 1.344 ; ; 2.221 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.020 ; 2.325 ; ; 2.228 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.508 ; 1.344 ; ; 2.241 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.889 ; 1.476 ; ; 2.242 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.901 ; 1.465 ; ; 2.260 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|15 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.408 ; 1.476 ; ; 2.261 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst1|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.420 ; 1.465 ; ; 2.292 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; -0.989 ; 1.427 ; ; 2.311 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|14 ; lpm_ram_dq:_RAM_BUSIN2|altram:sram|altsyncram:ram_block|altsyncram_ap71:auto_generated|ram_block1a0~porta_datain_reg0 ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; -0.508 ; 1.427 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'Timing:inst1|inst2' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ ; 1.045 ; Reg8:_AR_BUSIN3|13 ; Reg8:_R2|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.124 ; 1.273 ; ; 1.059 ; Reg8:_AR_BUSIN3|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.124 ; 1.287 ; ; 1.103 ; Reg8:_AR_BUSIN3|15 ; Reg8:_R2|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.123 ; 1.330 ; ; 1.176 ; Reg8:_AR_BUSIN3|13 ; Reg8:_R1|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.012 ; 1.268 ; ; 1.194 ; Reg8:_AR_BUSIN3|16 ; Reg8:_R1|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.012 ; 1.286 ; ; 1.239 ; Reg8:_AR_BUSIN3|15 ; Reg8:_R1|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.013 ; 1.330 ; ; 1.249 ; Reg8:_AR_BUSIN3|14 ; Reg8:_R2|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; 0.124 ; 1.477 ; ; 1.260 ; Reg8:_AR_BUSIN3|18 ; Reg8:_R2|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.073 ; 1.291 ; ; 1.267 ; Reg8:_AR_BUSIN3|17 ; Reg8:_IR|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.394 ; 0.977 ; ; 1.280 ; Reg8:_AR_BUSIN3|17 ; Reg8:_R1|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.010 ; 1.374 ; ; 1.285 ; Reg8:_AR_BUSIN3|18 ; Reg8:_R1|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.012 ; 1.377 ; ; 1.303 ; Reg8:_AR_BUSIN3|13 ; Reg8:_IR|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.367 ; 1.040 ; ; 1.308 ; Reg8:_R1|13 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.616 ; ; 1.345 ; Reg8:_AR_BUSIN3|17 ; Reg8:_R2|17 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.071 ; 1.378 ; ; 1.381 ; Reg8:_AR_BUSIN3|16 ; Reg8:_IR|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.367 ; 1.118 ; ; 1.385 ; Reg8:_AR_BUSIN3|14 ; Reg8:_R1|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.012 ; 1.477 ; ; 1.408 ; Reg8:_AR_BUSIN3|18 ; Reg8:_IR|18 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.396 ; 1.116 ; ; 1.434 ; Reg8:_R1|15 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.742 ; ; 1.485 ; Reg8:_R1|17 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.222 ; 1.791 ; ; 1.489 ; Reg8:_R1|15 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.797 ; ; 1.490 ; Reg8:_R1|13 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.611 ; ; 1.495 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.285 ; 2.884 ; ; 1.520 ; Reg8:_AR_BUSIN3|19 ; Reg8:_R1|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.010 ; 1.614 ; ; 1.527 ; Reg8:_R1|17 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.222 ; 1.833 ; ; 1.530 ; Reg8:_R1|16 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.838 ; ; 1.549 ; Reg8:_R1|14 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.857 ; ; 1.553 ; Reg8:_AR_BUSIN3|15 ; Reg8:_IR|15 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.380 ; 1.277 ; ; 1.564 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.285 ; 2.953 ; ; 1.566 ; Reg8:_R1|13 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.267 ; 1.383 ; ; 1.579 ; Reg8:_AR_BUSIN3|19 ; Reg8:_R2|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.071 ; 1.612 ; ; 1.593 ; Reg8:_R2|17 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.232 ; 1.909 ; ; 1.594 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.285 ; 2.983 ; ; 1.597 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.285 ; 2.986 ; ; 1.613 ; Reg8:_R1|16 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.921 ; ; 1.621 ; Reg8:_R1|15 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.742 ; ; 1.624 ; Reg8:_R1|17 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.222 ; 1.930 ; ; 1.627 ; Reg8:_R1|16 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.935 ; ; 1.630 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|16 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.149 ; 2.883 ; ; 1.635 ; Reg8:_R1|17 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.296 ; 1.423 ; ; 1.639 ; Reg8:_AR_BUSIN3|19 ; Reg8:_IR|19 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.394 ; 1.349 ; ; 1.653 ; Reg8:_R2|17 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.232 ; 1.969 ; ; 1.659 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.609 ; 1.154 ; ; 1.666 ; Reg8:_R1|18 ; Reg8:_R2|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.027 ; 1.777 ; ; 1.671 ; Reg8:_R1|17 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.035 ; 1.790 ; ; 1.676 ; Reg8:_R1|15 ; Reg8:_R1|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.797 ; ; 1.678 ; Reg8:_R1|14 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 1.986 ; ; 1.678 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R2|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.128 ; 1.154 ; ; 1.681 ; Reg8:_R2|17 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.143 ; 1.908 ; ; 1.682 ; Reg8:_R2|15 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.044 ; 1.810 ; ; 1.687 ; Reg8:_R2|17 ; Reg8:_IR|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.239 ; 1.532 ; ; 1.694 ; Reg8:_R2|13 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.044 ; 1.822 ; ; 1.698 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_R2|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.609 ; 1.193 ; ; 1.699 ; Reg8:_R1|17 ; Reg8:_R1|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.820 ; ; 1.700 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|14 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.149 ; 2.953 ; ; 1.700 ; Reg8:_R2|17 ; Reg8:_R1|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.145 ; 1.929 ; ; 1.702 ; Reg8:_R1|15 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.224 ; 2.010 ; ; 1.705 ; Reg8:_R2|18 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.145 ; 1.934 ; ; 1.710 ; Reg8:_R2|19 ; Reg8:_R1|19 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.145 ; 1.939 ; ; 1.713 ; Reg8:_R1|17 ; Reg8:_R2|17 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.027 ; 1.824 ; ; 1.714 ; Reg8:_R1|18 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.222 ; 2.020 ; ; 1.714 ; Reg8:_R1|17 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.035 ; 1.833 ; ; 1.715 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.090 ; 2.909 ; ; 1.717 ; Reg8:_R1|16 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.838 ; ; 1.717 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|14 ; Reg8:_R2|14 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.128 ; 1.193 ; ; 1.719 ; Reg8:_R2|16 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.044 ; 1.847 ; ; 1.722 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_R2|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.710 ; 1.116 ; ; 1.725 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|13 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.149 ; 2.978 ; ; 1.726 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_R2|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.609 ; 1.221 ; ; 1.727 ; Reg8:_R2|18 ; Reg8:_R2|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.848 ; ; 1.730 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_IR|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 0.767 ; 2.601 ; ; 1.731 ; Reg8:_R1|14 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.852 ; ; 1.733 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|15 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.149 ; 2.986 ; ; 1.733 ; Reg8:_R2|16 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.044 ; 1.861 ; ; 1.740 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|18 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.151 ; 2.995 ; ; 1.741 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|16 ; Reg8:_R2|16 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.229 ; 1.116 ; ; 1.742 ; Reg8:_R1|18 ; Reg8:_R1|18 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.863 ; ; 1.742 ; Reg8:_R2|17 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.143 ; 1.969 ; ; 1.743 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.151 ; 2.998 ; ; 1.745 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|13 ; Reg8:_R2|13 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; -0.500 ; -0.128 ; 1.221 ; ; 1.746 ; Reg8:_R2|19 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.232 ; 2.062 ; ; 1.749 ; Reg8:_R1|19 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.222 ; 2.055 ; ; 1.750 ; Reg8:_R2|17 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.232 ; 2.066 ; ; 1.756 ; Reg8:_R1|18 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.222 ; 2.062 ; ; 1.770 ; Reg8:_AR_BUSIN3|14 ; Reg8:_IR|14 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.367 ; 1.507 ; ; 1.771 ; Reg8:_R2|15 ; Reg8:_R1|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.045 ; 1.810 ; ; 1.773 ; Reg8:_R2|18 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.232 ; 2.089 ; ; 1.776 ; Reg8:_R1|19 ; Reg8:_R2|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.222 ; 2.082 ; ; 1.778 ; Reg8:_R2|13 ; Reg8:_R1|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.045 ; 1.817 ; ; 1.782 ; Reg8:_R2|15 ; Reg8:_R2|15 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.044 ; 1.910 ; ; 1.784 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R1|19 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.151 ; 3.039 ; ; 1.784 ; Reg8:_R2|19 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.232 ; 2.100 ; ; 1.785 ; Reg8:_R2|14 ; Reg8:_R2|14 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.044 ; 1.913 ; ; 1.789 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst8|13 ; Reg8:_R2|13 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.710 ; 1.183 ; ; 1.794 ; Registers_3:_R4-5-6_BUSIN4-5-6|Reg8:inst5|16 ; Reg8:_R1|16 ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 0.000 ; -0.745 ; 1.153 ; ; 1.798 ; Reg8:_R2|14 ; Reg8:_R2|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.044 ; 1.926 ; ; 1.799 ; Reg8:_R1|16 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; 0.037 ; 1.920 ; ; 1.807 ; Reg8:_R1|17 ; Reg8:_IR|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.269 ; 1.622 ; ; 1.807 ; Reg8:_R1|14 ; Reg8:_IR|13 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.267 ; 1.624 ; ; 1.807 ; Reg8:_R2|16 ; Reg8:_R1|16 ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 0.000 ; -0.045 ; 1.846 ; ; 1.808 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; Reg8:_R2|17 ; Timing:inst1|inst ; Timing:inst1|inst2 ; 0.000 ; 1.090 ; 3.002 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------+--------------------+--------------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Recovery: 'Timing:inst1|inst1' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -4.445 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; -0.361 ; 5.071 ; ; -3.082 ; Reg8:_R2|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.338 ; 3.731 ; ; -2.983 ; Reg8:_R2|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.338 ; 3.632 ; ; -2.941 ; Reg8:_R1|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.399 ; 3.529 ; ; -2.901 ; Reg8:_R2|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.533 ; 3.355 ; ; -2.865 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 0.711 ; 4.563 ; ; -2.844 ; Reg8:_R1|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.399 ; 3.432 ; ; -2.839 ; Reg8:_R1|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.399 ; 3.427 ; ; -2.822 ; Reg8:_R2|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.533 ; 3.276 ; ; -2.736 ; Reg8:_R2|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.533 ; 3.190 ; ; -2.691 ; Reg8:_R2|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.338 ; 3.340 ; ; -2.686 ; Reg8:_R1|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.397 ; 3.276 ; ; -2.663 ; Reg8:_R1|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.397 ; 3.253 ; ; -2.622 ; Reg8:_R1|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.397 ; 3.212 ; ; -2.533 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 0.707 ; 4.227 ; ; -2.463 ; Reg8:_R2|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.533 ; 2.917 ; ; -2.449 ; Reg8:_R1|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.397 ; 3.039 ; ; -2.408 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 0.702 ; 4.097 ; ; -2.379 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 1.000 ; 0.709 ; 4.075 ; ; -1.578 ; Reg8:_IR|17 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.013 ; 2.552 ; ; -1.356 ; Reg8:_IR|14 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.044 ; 2.299 ; ; -1.290 ; Reg8:_IR|15 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.028 ; 2.249 ; ; -0.908 ; Reg8:_IR|13 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 1.000 ; -0.049 ; 1.846 ; ; -0.615 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 1.507 ; 2.714 ; ; -0.532 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 1.502 ; 2.626 ; ; -0.497 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 1.511 ; 2.600 ; ; -0.436 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.500 ; 1.509 ; 2.537 ; ; -0.125 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.500 ; 1.507 ; 2.224 ; ; 0.138 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 1.507 ; 2.461 ; ; 0.208 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 1.502 ; 2.386 ; ; 0.241 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 1.511 ; 2.362 ; ; 0.301 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 1.000 ; 1.509 ; 2.300 ; ; 0.586 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 1.000 ; 1.507 ; 2.013 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Recovery: 'Timing:inst1|inst3' ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.762 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 1.000 ; 1.135 ; 2.884 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; -0.245 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.500 ; 1.935 ; 2.772 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; ; 0.515 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 1.000 ; 1.935 ; 2.512 ; +--------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Removal: 'Timing:inst1|inst1' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.142 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0.000 ; 1.581 ; 1.932 ; ; 0.375 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 1.583 ; 2.167 ; ; 0.412 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 1.584 ; 2.205 ; ; 0.493 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 1.575 ; 2.277 ; ; 0.546 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 0.000 ; 1.581 ; 2.336 ; ; 0.842 ; Reg8:_IR|16 ; uARReg:inst2|inst41~_emulated ; Reg8:_IR|16 ; Timing:inst1|inst1 ; -0.500 ; 1.581 ; 2.132 ; ; 1.066 ; Timing:inst1|inst3 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 1.583 ; 2.358 ; ; 1.135 ; Timing:inst1|inst3 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 1.584 ; 2.428 ; ; 1.203 ; Timing:inst1|inst3 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 1.575 ; 2.487 ; ; 1.292 ; Timing:inst1|inst3 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; -0.500 ; 1.581 ; 2.582 ; ; 1.408 ; Reg8:_IR|13 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.095 ; 1.607 ; ; 1.710 ; Reg8:_IR|15 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.115 ; 1.929 ; ; 1.787 ; Reg8:_IR|14 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.101 ; 1.992 ; ; 1.956 ; Reg8:_IR|17 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; 0.130 ; 2.190 ; ; 2.231 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.826 ; 3.161 ; ; 2.242 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst40~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.827 ; 3.173 ; ; 2.256 ; Reg8:_R1|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.235 ; 2.125 ; ; 2.436 ; Reg8:_R2|13 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.368 ; 2.172 ; ; 2.444 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst42~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.818 ; 3.366 ; ; 2.501 ; Reg8:_R1|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.235 ; 2.370 ; ; 2.513 ; Reg8:_R1|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.237 ; 2.380 ; ; 2.527 ; Reg8:_R2|18 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.180 ; 2.451 ; ; 2.535 ; Reg8:_R2|14 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.368 ; 2.271 ; ; 2.544 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; uARReg:inst2|inst41~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; 0.824 ; 3.472 ; ; 2.549 ; Reg8:_R2|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.368 ; 2.285 ; ; 2.563 ; Reg8:_R1|15 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.235 ; 2.432 ; ; 2.645 ; Reg8:_R2|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.180 ; 2.569 ; ; 2.677 ; Reg8:_R1|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.237 ; 2.544 ; ; 2.685 ; Reg8:_R1|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.235 ; 2.554 ; ; 2.710 ; Reg8:_R1|19 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.237 ; 2.577 ; ; 2.738 ; Reg8:_R2|17 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.180 ; 2.662 ; ; 2.834 ; Reg8:_R2|16 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 0.000 ; -0.368 ; 2.570 ; ; 3.363 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a0~porta_address_reg0 ; uARReg:inst2|inst44~_emulated ; Timing:inst1|inst ; Timing:inst1|inst1 ; 0.000 ; -0.202 ; 3.265 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-------------------------------+--------------------+--------------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Removal: 'Timing:inst1|inst3' ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.197 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 0.000 ; 2.026 ; 2.412 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 0.922 ; Timing:inst1|inst3 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; -0.500 ; 2.026 ; 2.657 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[0] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[1] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[2] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[3] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[4] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[5] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[6] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; ; 1.154 ; lpm_rom0:inst9|lpm_rom:inst|altrom:srom|altsyncram:rom_block|altsyncram_od01:auto_generated|ram_block1a6~porta_address_reg0 ; lpm_counter0:_PC|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated|counter_reg_bit[7] ; Timing:inst1|inst ; Timing:inst1|inst3 ; 0.000 ; 1.269 ; 2.527 ; +-------+-----------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------+--------------------+--------------------+--------------+------------+------------+ ---------------------------------------------- ; Fast 1200mV 0C Model Metastability Summary ; ---------------------------------------------- No synchronizer chains to report. +------------------------------------------------------------------------------------+ ; Multicorner Timing Analysis Summary ; +---------------------+----------+--------+----------+---------+---------------------+ ; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ; +---------------------+----------+--------+----------+---------+---------------------+ ; Worst-case Slack ; -10.490 ; -0.147 ; -8.993 ; 0.142 ; -3.000 ; ; CLK1 ; -0.900 ; 0.177 ; N/A ; N/A ; -3.000 ; ; Reg8:_IR|16 ; -7.391 ; 0.468 ; N/A ; N/A ; -1.000 ; ; Timing:inst1|inst ; -9.284 ; -0.099 ; N/A ; N/A ; -2.174 ; ; Timing:inst1|inst1 ; -6.700 ; 0.514 ; -8.993 ; 0.142 ; -2.174 ; ; Timing:inst1|inst2 ; -7.135 ; 1.045 ; N/A ; N/A ; -1.000 ; ; Timing:inst1|inst3 ; -10.490 ; -0.147 ; -2.546 ; 0.197 ; -1.000 ; ; Design-wide TNS ; -599.678 ; -0.599 ; -46.225 ; 0.0 ; -109.87 ; ; CLK1 ; -3.236 ; 0.000 ; N/A ; N/A ; -8.746 ; ; Reg8:_IR|16 ; -129.558 ; 0.000 ; N/A ; N/A ; -21.000 ; ; Timing:inst1|inst ; -18.198 ; -0.099 ; N/A ; N/A ; -4.348 ; ; Timing:inst1|inst1 ; -31.169 ; 0.000 ; -25.857 ; 0.000 ; -12.522 ; ; Timing:inst1|inst2 ; -138.985 ; 0.000 ; N/A ; N/A ; -21.000 ; ; Timing:inst1|inst3 ; -278.532 ; -0.599 ; -20.368 ; 0.000 ; -43.000 ; +---------------------+----------+--------+----------+---------+---------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Board Trace Model Assignments ; +---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+ ; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ; +---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+ ; PC_B ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[23] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[22] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[21] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[20] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[19] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[18] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[17] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[16] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[15] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[14] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[13] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[12] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[11] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[10] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[9] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[8] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; M[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; T1 ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; uaddr[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; uaddr[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; uaddr[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; uaddr[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; uaddr[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; uaddr[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; T2 ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; T3 ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; T4 ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; LDAR ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; PC[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; LDPC ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; I[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; RAM_B ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; SW_B ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; LED_B ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; bus[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; in[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; led[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ; +---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+ +----------------------------------------------------------------------------+ ; Input Transition Times ; +-------------------------+--------------+-----------------+-----------------+ ; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ; +-------------------------+--------------+-----------------+-----------------+ ; RST1 ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[7] ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[6] ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[5] ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[4] ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[3] ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[2] ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[1] ; 2.5 V ; 2000 ps ; 2000 ps ; ; d0[0] ; 2.5 V ; 2000 ps ; 2000 ps ; ; STEP ; 2.5 V ; 2000 ps ; 2000 ps ; ; SWB ; 2.5 V ; 2000 ps ; 2000 ps ; ; SWA ; 2.5 V ; 2000 ps ; 2000 ps ; ; CLK1 ; 2.5 V ; 2000 ps ; 2000 ps ; ; ~ALTERA_ASDO_DATA1~ ; 2.5 V ; 2000 ps ; 2000 ps ; ; ~ALTERA_FLASH_nCE_nCSO~ ; 2.5 V ; 2000 ps ; 2000 ps ; ; ~ALTERA_DATA0~ ; 2.5 V ; 2000 ps ; 2000 ps ; +-------------------------+--------------+-----------------+-----------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Signal Integrity Metrics (Slow 1200mv 0c Model) ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; PC_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[23] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[22] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[21] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[20] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; M[19] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[18] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; ; M[17] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[16] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[15] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[14] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.33 V ; -0.00624 V ; 0.185 V ; 0.097 V ; 2.82e-09 s ; 2.56e-09 s ; No ; Yes ; 2.32 V ; 4.44e-09 V ; 2.33 V ; -0.00624 V ; 0.185 V ; 0.097 V ; 2.82e-09 s ; 2.56e-09 s ; No ; Yes ; ; M[13] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; M[12] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[11] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[10] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.33 V ; -0.00624 V ; 0.185 V ; 0.097 V ; 2.82e-09 s ; 2.56e-09 s ; No ; Yes ; 2.32 V ; 4.44e-09 V ; 2.33 V ; -0.00624 V ; 0.185 V ; 0.097 V ; 2.82e-09 s ; 2.56e-09 s ; No ; Yes ; ; M[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; M[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; M[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; M[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; M[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; T1 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; uaddr[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; uaddr[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; uaddr[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; uaddr[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; uaddr[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; uaddr[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; T2 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; ; T3 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; T4 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; LDAR ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; PC[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; PC[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; ; PC[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.39 V ; -0.0265 V ; 0.2 V ; 0.033 V ; 2.94e-10 s ; 3.12e-10 s ; Yes ; Yes ; ; PC[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; PC[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; PC[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; PC[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; PC[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; LDPC ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; I[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; I[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; I[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; I[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; I[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; I[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; I[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; I[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; RAM_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; SW_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; LED_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; bus[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; bus[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; bus[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; bus[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; bus[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; bus[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; bus[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.33 V ; -0.00616 V ; 0.191 V ; 0.099 V ; 2.83e-09 s ; 2.56e-09 s ; No ; Yes ; 2.32 V ; 5.95e-09 V ; 2.33 V ; -0.00616 V ; 0.191 V ; 0.099 V ; 2.83e-09 s ; 2.56e-09 s ; No ; Yes ; ; bus[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; in[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; in[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; in[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.33 V ; -0.00624 V ; 0.185 V ; 0.097 V ; 2.82e-09 s ; 2.56e-09 s ; No ; Yes ; 2.32 V ; 4.44e-09 V ; 2.33 V ; -0.00624 V ; 0.185 V ; 0.097 V ; 2.82e-09 s ; 2.56e-09 s ; No ; Yes ; ; in[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; in[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; in[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; in[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; in[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; led[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; led[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; led[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; led[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.33 V ; -0.00616 V ; 0.191 V ; 0.099 V ; 2.83e-09 s ; 2.56e-09 s ; No ; Yes ; 2.32 V ; 5.95e-09 V ; 2.33 V ; -0.00616 V ; 0.191 V ; 0.099 V ; 2.83e-09 s ; 2.56e-09 s ; No ; Yes ; ; led[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; led[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; led[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; 2.32 V ; 4.44e-09 V ; 2.38 V ; -0.0145 V ; 0.169 V ; 0.026 V ; 4.83e-10 s ; 4.71e-10 s ; Yes ; Yes ; ; led[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; 2.32 V ; 5.95e-09 V ; 2.38 V ; -0.016 V ; 0.22 V ; 0.025 V ; 3.06e-10 s ; 3.3e-10 s ; Yes ; Yes ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.45e-09 V ; 2.38 V ; -0.0609 V ; 0.148 V ; 0.095 V ; 2.82e-10 s ; 2.59e-10 s ; Yes ; Yes ; 2.32 V ; 3.45e-09 V ; 2.38 V ; -0.0609 V ; 0.148 V ; 0.095 V ; 2.82e-10 s ; 2.59e-10 s ; Yes ; Yes ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.61e-09 V ; 2.38 V ; -0.00274 V ; 0.141 V ; 0.006 V ; 4.7e-10 s ; 6.02e-10 s ; Yes ; Yes ; 2.32 V ; 5.61e-09 V ; 2.38 V ; -0.00274 V ; 0.141 V ; 0.006 V ; 4.7e-10 s ; 6.02e-10 s ; Yes ; Yes ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Signal Integrity Metrics (Slow 1200mv 85c Model) ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; PC_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[23] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[22] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[21] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[20] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; M[19] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[18] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; ; M[17] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[16] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[15] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[14] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.33 V ; -0.00349 V ; 0.163 V ; 0.074 V ; 3.33e-09 s ; 3.14e-09 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.33 V ; -0.00349 V ; 0.163 V ; 0.074 V ; 3.33e-09 s ; 3.14e-09 s ; Yes ; Yes ; ; M[13] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; M[12] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[11] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[10] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.33 V ; -0.00349 V ; 0.163 V ; 0.074 V ; 3.33e-09 s ; 3.14e-09 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.33 V ; -0.00349 V ; 0.163 V ; 0.074 V ; 3.33e-09 s ; 3.14e-09 s ; Yes ; Yes ; ; M[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; M[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; M[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; M[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; M[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; T1 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; uaddr[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; uaddr[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; uaddr[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; uaddr[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; uaddr[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; uaddr[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; T2 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; ; T3 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; T4 ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; LDAR ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; PC[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; PC[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; ; PC[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.36 V ; -0.00476 V ; 0.096 V ; 0.013 V ; 4.39e-10 s ; 4.15e-10 s ; Yes ; Yes ; ; PC[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; PC[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; PC[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; PC[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; PC[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; LDPC ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; I[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; I[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; I[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; I[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; I[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; I[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; I[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; I[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; RAM_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; SW_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; LED_B ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; bus[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; bus[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; bus[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; bus[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; bus[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; bus[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; bus[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.33 V ; -0.00344 V ; 0.134 V ; 0.075 V ; 3.33e-09 s ; 3.16e-09 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.33 V ; -0.00344 V ; 0.134 V ; 0.075 V ; 3.33e-09 s ; 3.16e-09 s ; Yes ; Yes ; ; bus[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; in[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; in[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; in[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.33 V ; -0.00349 V ; 0.163 V ; 0.074 V ; 3.33e-09 s ; 3.14e-09 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.33 V ; -0.00349 V ; 0.163 V ; 0.074 V ; 3.33e-09 s ; 3.14e-09 s ; Yes ; Yes ; ; in[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; in[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; in[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; in[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; in[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; led[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; led[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; led[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; led[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.33 V ; -0.00344 V ; 0.134 V ; 0.075 V ; 3.33e-09 s ; 3.16e-09 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.33 V ; -0.00344 V ; 0.134 V ; 0.075 V ; 3.33e-09 s ; 3.16e-09 s ; Yes ; Yes ; ; led[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; led[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; led[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; 2.32 V ; 7.16e-07 V ; 2.35 V ; -0.00832 V ; 0.101 V ; 0.024 V ; 6.39e-10 s ; 6e-10 s ; Yes ; Yes ; ; led[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; 2.32 V ; 1.06e-06 V ; 2.36 V ; -0.00724 V ; 0.107 V ; 0.02 V ; 4.5e-10 s ; 4.25e-10 s ; Yes ; Yes ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 5.74e-07 V ; 2.36 V ; -0.0201 V ; 0.072 V ; 0.033 V ; 4.04e-10 s ; 3.29e-10 s ; Yes ; Yes ; 2.32 V ; 5.74e-07 V ; 2.36 V ; -0.0201 V ; 0.072 V ; 0.033 V ; 4.04e-10 s ; 3.29e-10 s ; Yes ; Yes ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 9.45e-07 V ; 2.35 V ; -0.00643 V ; 0.081 V ; 0.031 V ; 5.31e-10 s ; 7.59e-10 s ; Yes ; Yes ; 2.32 V ; 9.45e-07 V ; 2.35 V ; -0.00643 V ; 0.081 V ; 0.031 V ; 5.31e-10 s ; 7.59e-10 s ; Yes ; Yes ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Signal Integrity Metrics (Fast 1200mv 0c Model) ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; PC_B ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[23] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[22] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[21] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[20] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; M[19] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[18] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; ; M[17] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[16] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[15] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[14] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.64 V ; -0.0117 V ; 0.202 V ; 0.176 V ; 2.38e-09 s ; 2.22e-09 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.64 V ; -0.0117 V ; 0.202 V ; 0.176 V ; 2.38e-09 s ; 2.22e-09 s ; No ; Yes ; ; M[13] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; M[12] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[11] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[10] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.64 V ; -0.0117 V ; 0.202 V ; 0.176 V ; 2.38e-09 s ; 2.22e-09 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.64 V ; -0.0117 V ; 0.202 V ; 0.176 V ; 2.38e-09 s ; 2.22e-09 s ; No ; Yes ; ; M[9] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; M[8] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; M[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; M[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; M[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; T1 ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; uaddr[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; uaddr[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; uaddr[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; uaddr[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; uaddr[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; uaddr[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; T2 ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; ; T3 ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; T4 ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; LDAR ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; PC[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; PC[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; ; PC[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; 2.62 V ; 2.74e-08 V ; 2.73 V ; -0.0384 V ; 0.169 V ; 0.089 V ; 2.7e-10 s ; 2.62e-10 s ; Yes ; Yes ; ; PC[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; PC[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; PC[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; PC[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; PC[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; LDPC ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; I[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; I[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; I[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; I[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; I[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; I[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; I[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; I[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; RAM_B ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; SW_B ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; LED_B ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; bus[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; bus[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; bus[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; bus[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; bus[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; bus[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; bus[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; ; bus[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; in[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; in[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; in[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.64 V ; -0.0117 V ; 0.202 V ; 0.176 V ; 2.38e-09 s ; 2.22e-09 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.64 V ; -0.0117 V ; 0.202 V ; 0.176 V ; 2.38e-09 s ; 2.22e-09 s ; No ; Yes ; ; in[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; in[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; in[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; in[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; in[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; led[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; led[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; led[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; led[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; ; led[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; led[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; led[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; 2.62 V ; 2.74e-08 V ; 2.71 V ; -0.0317 V ; 0.148 V ; 0.064 V ; 4.51e-10 s ; 4.15e-10 s ; No ; Yes ; ; led[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; ; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ; ; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.54e-08 V ; 2.7 V ; -0.00943 V ; 0.276 V ; 0.035 V ; 3.19e-10 s ; 4.99e-10 s ; No ; Yes ; 2.62 V ; 3.54e-08 V ; 2.7 V ; -0.00943 V ; 0.276 V ; 0.035 V ; 3.19e-10 s ; 4.99e-10 s ; No ; Yes ; +---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ +-------------------------------------------------------------------------------------+ ; Setup Transfers ; +--------------------+--------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +--------------------+--------------------+----------+----------+----------+----------+ ; Timing:inst1|inst ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst1 ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst2 ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst3 ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0 ; 0 ; 0 ; 63 ; ; Timing:inst1|inst ; Reg8:_IR|16 ; 0 ; 0 ; 1224 ; 0 ; ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0 ; 0 ; 21 ; 0 ; ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0 ; 0 ; 342 ; 0 ; ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0 ; 0 ; 84 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst ; 422 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst ; 12 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst ; 356 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst ; 8 ; 8 ; 0 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0 ; 21 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst1 ; 470 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 8 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 144 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 35 ; 0 ; 0 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0 ; 63 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1224 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 21 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 342 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 84 ; 0 ; 0 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst3 ; 0 ; 126 ; 0 ; 21 ; ; Timing:inst1|inst ; Timing:inst1|inst3 ; 2490 ; 0 ; 463 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 42 ; 0 ; 8 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 684 ; 0 ; 144 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 218 ; 58 ; 28 ; 0 ; +--------------------+--------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +-------------------------------------------------------------------------------------+ ; Hold Transfers ; +--------------------+--------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +--------------------+--------------------+----------+----------+----------+----------+ ; Timing:inst1|inst ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst1 ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst2 ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst3 ; CLK1 ; 2 ; 2 ; 0 ; 0 ; ; Reg8:_IR|16 ; Reg8:_IR|16 ; 0 ; 0 ; 0 ; 63 ; ; Timing:inst1|inst ; Reg8:_IR|16 ; 0 ; 0 ; 1224 ; 0 ; ; Timing:inst1|inst1 ; Reg8:_IR|16 ; 0 ; 0 ; 21 ; 0 ; ; Timing:inst1|inst2 ; Reg8:_IR|16 ; 0 ; 0 ; 342 ; 0 ; ; Timing:inst1|inst3 ; Reg8:_IR|16 ; 0 ; 0 ; 84 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst ; 2 ; 2 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst ; 422 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst ; 12 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst ; 356 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst ; 8 ; 8 ; 0 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 0 ; 21 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst1 ; 470 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; 8 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 144 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 35 ; 0 ; 0 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst2 ; 0 ; 63 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst2 ; 1224 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst2 ; 21 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; 342 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst2 ; 84 ; 0 ; 0 ; 0 ; ; Reg8:_IR|16 ; Timing:inst1|inst3 ; 0 ; 126 ; 0 ; 21 ; ; Timing:inst1|inst ; Timing:inst1|inst3 ; 2490 ; 0 ; 463 ; 0 ; ; Timing:inst1|inst1 ; Timing:inst1|inst3 ; 42 ; 0 ; 8 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst3 ; 684 ; 0 ; 144 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 218 ; 58 ; 28 ; 0 ; +--------------------+--------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +-------------------------------------------------------------------------------------+ ; Recovery Transfers ; +--------------------+--------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +--------------------+--------------------+----------+----------+----------+----------+ ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 1 ; 1 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst1 ; 211 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 178 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 4 ; 4 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst3 ; 24 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 8 ; 8 ; 0 ; 0 ; +--------------------+--------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. +-------------------------------------------------------------------------------------+ ; Removal Transfers ; +--------------------+--------------------+----------+----------+----------+----------+ ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +--------------------+--------------------+----------+----------+----------+----------+ ; Reg8:_IR|16 ; Timing:inst1|inst1 ; 1 ; 1 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst1 ; 211 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst2 ; Timing:inst1|inst1 ; 178 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst1 ; 4 ; 4 ; 0 ; 0 ; ; Timing:inst1|inst ; Timing:inst1|inst3 ; 24 ; 0 ; 0 ; 0 ; ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; 8 ; 8 ; 0 ; 0 ; +--------------------+--------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. --------------- ; Report TCCS ; --------------- No dedicated SERDES Transmitter circuitry present in device or used in design --------------- ; Report RSKM ; --------------- No non-DPA dedicated SERDES Receiver circuitry present in device or used in design +------------------------------------------------+ ; Unconstrained Paths Summary ; +---------------------------------+-------+------+ ; Property ; Setup ; Hold ; +---------------------------------+-------+------+ ; Illegal Clocks ; 0 ; 0 ; ; Unconstrained Clocks ; 0 ; 0 ; ; Unconstrained Input Ports ; 12 ; 12 ; ; Unconstrained Input Port Paths ; 158 ; 158 ; ; Unconstrained Output Ports ; 78 ; 78 ; ; Unconstrained Output Port Paths ; 392 ; 392 ; +---------------------------------+-------+------+ +--------------------------------------------------------------+ ; Clock Status Summary ; +--------------------+--------------------+------+-------------+ ; Target ; Clock ; Type ; Status ; +--------------------+--------------------+------+-------------+ ; CLK1 ; CLK1 ; Base ; Constrained ; ; Reg8:_IR|16 ; Reg8:_IR|16 ; Base ; Constrained ; ; Timing:inst1|inst ; Timing:inst1|inst ; Base ; Constrained ; ; Timing:inst1|inst1 ; Timing:inst1|inst1 ; Base ; Constrained ; ; Timing:inst1|inst2 ; Timing:inst1|inst2 ; Base ; Constrained ; ; Timing:inst1|inst3 ; Timing:inst1|inst3 ; Base ; Constrained ; +--------------------+--------------------+------+-------------+ +---------------------------------------------------------------------------------------------------+ ; Unconstrained Input Ports ; +------------+--------------------------------------------------------------------------------------+ ; Input Port ; Comment ; +------------+--------------------------------------------------------------------------------------+ ; RST1 ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; STEP ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; SWA ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; SWB ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +------------+--------------------------------------------------------------------------------------+ +-----------------------------------------------------------------------------------------------------+ ; Unconstrained Output Ports ; +-------------+---------------------------------------------------------------------------------------+ ; Output Port ; Comment ; +-------------+---------------------------------------------------------------------------------------+ ; I[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; LDAR ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; LDPC ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; LED_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[8] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[9] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[10] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[11] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[12] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[13] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[14] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[15] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[16] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[17] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[18] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[19] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[20] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[21] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[22] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[23] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; RAM_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; SW_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T3 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T4 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +-------------+---------------------------------------------------------------------------------------+ +---------------------------------------------------------------------------------------------------+ ; Unconstrained Input Ports ; +------------+--------------------------------------------------------------------------------------+ ; Input Port ; Comment ; +------------+--------------------------------------------------------------------------------------+ ; RST1 ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; STEP ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; SWA ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; SWB ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ; d0[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +------------+--------------------------------------------------------------------------------------+ +-----------------------------------------------------------------------------------------------------+ ; Unconstrained Output Ports ; +-------------+---------------------------------------------------------------------------------------+ ; Output Port ; Comment ; +-------------+---------------------------------------------------------------------------------------+ ; I[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; I[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; LDAR ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; LDPC ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; LED_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[8] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[9] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[10] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[11] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[12] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[13] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[14] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[15] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[16] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[17] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[18] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[19] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[20] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[21] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[22] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; M[23] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; PC_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; RAM_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; SW_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T3 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; T4 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; bus[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; in[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; led[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ; uaddr[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +-------------+---------------------------------------------------------------------------------------+ +------------------------------------+ ; TimeQuest Timing Analyzer Messages ; +------------------------------------+ Info: ******************************************************************* Info: Running Quartus Prime TimeQuest Timing Analyzer Info: Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition Info: Processing started: Mon Nov 06 09:18:38 2023 Info: Command: quartus_sta mux21a2627 -c mux21a2627 Info: qsta_default_script.tcl version: #3 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance. Info (20030): Parallel compilation is enabled and will use 16 of the 16 processors detected Info (21076): High junction temperature operating condition is not set. Assuming a default value of '85'. Info (21076): Low junction temperature operating condition is not set. Assuming a default value of '0'. Warning (335093): TimeQuest Timing Analyzer is analyzing 12 combinational loops as latches. For more details, run the Check Timing command in the TimeQuest Timing Analyzer or view the "User-Specified and Inferred Latches" table in the Analysis & Synthesis report. Critical Warning (332012): Synopsys Design Constraints File file not found: 'mux21a2627.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design. Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" Info (332105): Deriving Clocks Info (332105): create_clock -period 1.000 -name Timing:inst1|inst Timing:inst1|inst Info (332105): create_clock -period 1.000 -name Timing:inst1|inst1 Timing:inst1|inst1 Info (332105): create_clock -period 1.000 -name Timing:inst1|inst2 Timing:inst1|inst2 Info (332105): create_clock -period 1.000 -name Reg8:_IR|16 Reg8:_IR|16 Info (332105): create_clock -period 1.000 -name CLK1 CLK1 Info (332105): create_clock -period 1.000 -name Timing:inst1|inst3 Timing:inst1|inst3 Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty" Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON Info: Analyzing Slow 1200mV 85C Model Critical Warning (332148): Timing requirements not met Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer. Info (332146): Worst-case setup slack is -10.490 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -10.490 -278.532 Timing:inst1|inst3 Info (332119): -9.284 -18.198 Timing:inst1|inst Info (332119): -7.391 -129.558 Reg8:_IR|16 Info (332119): -7.135 -138.985 Timing:inst1|inst2 Info (332119): -6.700 -31.169 Timing:inst1|inst1 Info (332119): -0.900 -3.236 CLK1 Info (332146): Worst-case hold slack is -0.147 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -0.147 -0.599 Timing:inst1|inst3 Info (332119): 0.017 0.000 Timing:inst1|inst Info (332119): 0.275 0.000 CLK1 Info (332119): 0.935 0.000 Reg8:_IR|16 Info (332119): 0.945 0.000 Timing:inst1|inst1 Info (332119): 2.029 0.000 Timing:inst1|inst2 Info (332146): Worst-case recovery slack is -8.993 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -8.993 -25.857 Timing:inst1|inst1 Info (332119): -2.546 -20.368 Timing:inst1|inst3 Info (332146): Worst-case removal slack is 0.362 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 0.362 0.000 Timing:inst1|inst1 Info (332119): 0.405 0.000 Timing:inst1|inst3 Info (332146): Worst-case minimum pulse width slack is -3.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -3.000 -8.000 CLK1 Info (332119): -2.174 -12.522 Timing:inst1|inst1 Info (332119): -2.174 -4.348 Timing:inst1|inst Info (332119): -1.000 -43.000 Timing:inst1|inst3 Info (332119): -1.000 -21.000 Reg8:_IR|16 Info (332119): -1.000 -21.000 Timing:inst1|inst2 Info: Analyzing Slow 1200mV 0C Model Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Critical Warning (332148): Timing requirements not met Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer. Info (332146): Worst-case setup slack is -9.459 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -9.459 -244.814 Timing:inst1|inst3 Info (332119): -8.284 -16.263 Timing:inst1|inst Info (332119): -6.609 -115.273 Reg8:_IR|16 Info (332119): -6.297 -122.706 Timing:inst1|inst2 Info (332119): -5.949 -27.101 Timing:inst1|inst1 Info (332119): -0.688 -2.259 CLK1 Info (332146): Worst-case hold slack is -0.107 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -0.107 -0.467 Timing:inst1|inst3 Info (332119): 0.074 0.000 Timing:inst1|inst Info (332119): 0.177 0.000 CLK1 Info (332119): 0.862 0.000 Reg8:_IR|16 Info (332119): 0.875 0.000 Timing:inst1|inst1 Info (332119): 1.861 0.000 Timing:inst1|inst2 Info (332146): Worst-case recovery slack is -7.972 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -7.972 -22.912 Timing:inst1|inst1 Info (332119): -2.185 -17.480 Timing:inst1|inst3 Info (332146): Worst-case removal slack is 0.354 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 0.354 0.000 Timing:inst1|inst1 Info (332119): 0.417 0.000 Timing:inst1|inst3 Info (332146): Worst-case minimum pulse width slack is -3.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -3.000 -8.000 CLK1 Info (332119): -2.174 -12.522 Timing:inst1|inst1 Info (332119): -2.174 -4.348 Timing:inst1|inst Info (332119): -1.000 -43.000 Timing:inst1|inst3 Info (332119): -1.000 -21.000 Reg8:_IR|16 Info (332119): -1.000 -21.000 Timing:inst1|inst2 Info: Analyzing Fast 1200mV 0C Model Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Critical Warning (332148): Timing requirements not met Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer. Info (332146): Worst-case setup slack is -5.648 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -5.648 -130.812 Timing:inst1|inst3 Info (332119): -4.633 -9.089 Timing:inst1|inst Info (332119): -3.801 -65.416 Reg8:_IR|16 Info (332119): -3.464 -65.864 Timing:inst1|inst2 Info (332119): -3.191 -12.724 Timing:inst1|inst1 Info (332119): -0.565 -1.821 CLK1 Info (332146): Worst-case hold slack is -0.099 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -0.099 -0.099 Timing:inst1|inst Info (332119): -0.073 -0.170 Timing:inst1|inst3 Info (332119): 0.225 0.000 CLK1 Info (332119): 0.468 0.000 Reg8:_IR|16 Info (332119): 0.514 0.000 Timing:inst1|inst1 Info (332119): 1.045 0.000 Timing:inst1|inst2 Info (332146): Worst-case recovery slack is -4.445 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -4.445 -12.251 Timing:inst1|inst1 Info (332119): -0.762 -6.096 Timing:inst1|inst3 Info (332146): Worst-case removal slack is 0.142 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): 0.142 0.000 Timing:inst1|inst1 Info (332119): 0.197 0.000 Timing:inst1|inst3 Info (332146): Worst-case minimum pulse width slack is -3.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== Info (332119): -3.000 -8.746 CLK1 Info (332119): -1.000 -43.000 Timing:inst1|inst3 Info (332119): -1.000 -21.000 Reg8:_IR|16 Info (332119): -1.000 -21.000 Timing:inst1|inst2 Info (332119): -1.000 -9.000 Timing:inst1|inst1 Info (332119): -1.000 -2.000 Timing:inst1|inst Info (332102): Design is not fully constrained for setup requirements Info (332102): Design is not fully constrained for hold requirements Info: Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings Info: Peak virtual memory: 4915 megabytes Info: Processing ended: Mon Nov 06 09:18:40 2023 Info: Elapsed time: 00:00:02 Info: Total CPU time (on all processors): 00:00:02