|PC_AR
Q[0] <= Reg8:inst.Q[0]
Q[1] <= Reg8:inst.Q[1]
Q[2] <= Reg8:inst.Q[2]
Q[3] <= Reg8:inst.Q[3]
Q[4] <= Reg8:inst.Q[4]
Q[5] <= Reg8:inst.Q[5]
Q[6] <= Reg8:inst.Q[6]
Q[7] <= Reg8:inst.Q[7]
T4 => Reg8:inst.CLK
PC_B => BUSMUX:inst2.sel
T2 => lpm_counter0:inst5.clock
CLR => lpm_counter0:inst5.aclr
LOAD => lpm_counter0:inst5.aload
D[0] => lpm_counter0:inst5.data[0]
D[0] => BUSMUX:inst2.datab[0]
D[1] => lpm_counter0:inst5.data[1]
D[1] => BUSMUX:inst2.datab[1]
D[2] => lpm_counter0:inst5.data[2]
D[2] => BUSMUX:inst2.datab[2]
D[3] => lpm_counter0:inst5.data[3]
D[3] => BUSMUX:inst2.datab[3]
D[4] => lpm_counter0:inst5.data[4]
D[4] => BUSMUX:inst2.datab[4]
D[5] => lpm_counter0:inst5.data[5]
D[5] => BUSMUX:inst2.datab[5]
D[6] => lpm_counter0:inst5.data[6]
D[6] => BUSMUX:inst2.datab[6]
D[7] => lpm_counter0:inst5.data[7]
D[7] => BUSMUX:inst2.datab[7]


|PC_AR|Reg8:inst
Q[0] <= 19.DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= 18.DB_MAX_OUTPUT_PORT_TYPE
Q[2] <= 17.DB_MAX_OUTPUT_PORT_TYPE
Q[3] <= 16.DB_MAX_OUTPUT_PORT_TYPE
Q[4] <= 15.DB_MAX_OUTPUT_PORT_TYPE
Q[5] <= 14.DB_MAX_OUTPUT_PORT_TYPE
Q[6] <= 13.DB_MAX_OUTPUT_PORT_TYPE
Q[7] <= 12.DB_MAX_OUTPUT_PORT_TYPE
CLK => 19.CLK
CLK => 18.CLK
CLK => 17.CLK
CLK => 16.CLK
CLK => 15.CLK
CLK => 14.CLK
CLK => 13.CLK
CLK => 12.CLK
D[0] => 19.DATAIN
D[1] => 18.DATAIN
D[2] => 17.DATAIN
D[3] => 16.DATAIN
D[4] => 15.DATAIN
D[5] => 14.DATAIN
D[6] => 13.DATAIN
D[7] => 12.DATAIN


|PC_AR|BUSMUX:inst2
dataa[0] => lpm_mux:$00000.data[0][0]
dataa[1] => lpm_mux:$00000.data[0][1]
dataa[2] => lpm_mux:$00000.data[0][2]
dataa[3] => lpm_mux:$00000.data[0][3]
dataa[4] => lpm_mux:$00000.data[0][4]
dataa[5] => lpm_mux:$00000.data[0][5]
dataa[6] => lpm_mux:$00000.data[0][6]
dataa[7] => lpm_mux:$00000.data[0][7]
datab[0] => lpm_mux:$00000.data[1][0]
datab[1] => lpm_mux:$00000.data[1][1]
datab[2] => lpm_mux:$00000.data[1][2]
datab[3] => lpm_mux:$00000.data[1][3]
datab[4] => lpm_mux:$00000.data[1][4]
datab[5] => lpm_mux:$00000.data[1][5]
datab[6] => lpm_mux:$00000.data[1][6]
datab[7] => lpm_mux:$00000.data[1][7]
sel => lpm_mux:$00000.sel[0]
result[0] <= lpm_mux:$00000.result[0]
result[1] <= lpm_mux:$00000.result[1]
result[2] <= lpm_mux:$00000.result[2]
result[3] <= lpm_mux:$00000.result[3]
result[4] <= lpm_mux:$00000.result[4]
result[5] <= lpm_mux:$00000.result[5]
result[6] <= lpm_mux:$00000.result[6]
result[7] <= lpm_mux:$00000.result[7]


|PC_AR|BUSMUX:inst2|lpm_mux:$00000
data[0][0] => mux_erc:auto_generated.data[0]
data[0][1] => mux_erc:auto_generated.data[1]
data[0][2] => mux_erc:auto_generated.data[2]
data[0][3] => mux_erc:auto_generated.data[3]
data[0][4] => mux_erc:auto_generated.data[4]
data[0][5] => mux_erc:auto_generated.data[5]
data[0][6] => mux_erc:auto_generated.data[6]
data[0][7] => mux_erc:auto_generated.data[7]
data[1][0] => mux_erc:auto_generated.data[8]
data[1][1] => mux_erc:auto_generated.data[9]
data[1][2] => mux_erc:auto_generated.data[10]
data[1][3] => mux_erc:auto_generated.data[11]
data[1][4] => mux_erc:auto_generated.data[12]
data[1][5] => mux_erc:auto_generated.data[13]
data[1][6] => mux_erc:auto_generated.data[14]
data[1][7] => mux_erc:auto_generated.data[15]
sel[0] => mux_erc:auto_generated.sel[0]
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= mux_erc:auto_generated.result[0]
result[1] <= mux_erc:auto_generated.result[1]
result[2] <= mux_erc:auto_generated.result[2]
result[3] <= mux_erc:auto_generated.result[3]
result[4] <= mux_erc:auto_generated.result[4]
result[5] <= mux_erc:auto_generated.result[5]
result[6] <= mux_erc:auto_generated.result[6]
result[7] <= mux_erc:auto_generated.result[7]


|PC_AR|BUSMUX:inst2|lpm_mux:$00000|mux_erc:auto_generated
data[0] => result_node[0].IN1
data[1] => result_node[1].IN1
data[2] => result_node[2].IN1
data[3] => result_node[3].IN1
data[4] => result_node[4].IN1
data[5] => result_node[5].IN1
data[6] => result_node[6].IN1
data[7] => result_node[7].IN1
data[8] => result_node[0].IN1
data[9] => result_node[1].IN1
data[10] => result_node[2].IN1
data[11] => result_node[3].IN1
data[12] => result_node[4].IN1
data[13] => result_node[5].IN1
data[14] => result_node[6].IN1
data[15] => result_node[7].IN1
result[0] <= result_node[0].DB_MAX_OUTPUT_PORT_TYPE
result[1] <= result_node[1].DB_MAX_OUTPUT_PORT_TYPE
result[2] <= result_node[2].DB_MAX_OUTPUT_PORT_TYPE
result[3] <= result_node[3].DB_MAX_OUTPUT_PORT_TYPE
result[4] <= result_node[4].DB_MAX_OUTPUT_PORT_TYPE
result[5] <= result_node[5].DB_MAX_OUTPUT_PORT_TYPE
result[6] <= result_node[6].DB_MAX_OUTPUT_PORT_TYPE
result[7] <= result_node[7].DB_MAX_OUTPUT_PORT_TYPE
sel[0] => result_node[7].IN0
sel[0] => _.IN0
sel[0] => result_node[6].IN0
sel[0] => _.IN0
sel[0] => result_node[5].IN0
sel[0] => _.IN0
sel[0] => result_node[4].IN0
sel[0] => _.IN0
sel[0] => result_node[3].IN0
sel[0] => _.IN0
sel[0] => result_node[2].IN0
sel[0] => _.IN0
sel[0] => result_node[1].IN0
sel[0] => _.IN0
sel[0] => result_node[0].IN0
sel[0] => _.IN0


|PC_AR|lpm_counter0:inst5
aclr => aclr.IN1
aload => aload.IN1
clock => clock.IN1
data[0] => data[0].IN1
data[1] => data[1].IN1
data[2] => data[2].IN1
data[3] => data[3].IN1
data[4] => data[4].IN1
data[5] => data[5].IN1
data[6] => data[6].IN1
data[7] => data[7].IN1
q[0] <= lpm_counter:LPM_COUNTER_component.q
q[1] <= lpm_counter:LPM_COUNTER_component.q
q[2] <= lpm_counter:LPM_COUNTER_component.q
q[3] <= lpm_counter:LPM_COUNTER_component.q
q[4] <= lpm_counter:LPM_COUNTER_component.q
q[5] <= lpm_counter:LPM_COUNTER_component.q
q[6] <= lpm_counter:LPM_COUNTER_component.q
q[7] <= lpm_counter:LPM_COUNTER_component.q


|PC_AR|lpm_counter0:inst5|lpm_counter:LPM_COUNTER_component
clock => cntr_b6j:auto_generated.clock
clk_en => ~NO_FANOUT~
cnt_en => ~NO_FANOUT~
updown => ~NO_FANOUT~
aclr => cntr_b6j:auto_generated.aclr
aset => ~NO_FANOUT~
aconst => ~NO_FANOUT~
aload => cntr_b6j:auto_generated.aload
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sconst => ~NO_FANOUT~
sload => ~NO_FANOUT~
data[0] => cntr_b6j:auto_generated.data[0]
data[1] => cntr_b6j:auto_generated.data[1]
data[2] => cntr_b6j:auto_generated.data[2]
data[3] => cntr_b6j:auto_generated.data[3]
data[4] => cntr_b6j:auto_generated.data[4]
data[5] => cntr_b6j:auto_generated.data[5]
data[6] => cntr_b6j:auto_generated.data[6]
data[7] => cntr_b6j:auto_generated.data[7]
cin => ~NO_FANOUT~
q[0] <= cntr_b6j:auto_generated.q[0]
q[1] <= cntr_b6j:auto_generated.q[1]
q[2] <= cntr_b6j:auto_generated.q[2]
q[3] <= cntr_b6j:auto_generated.q[3]
q[4] <= cntr_b6j:auto_generated.q[4]
q[5] <= cntr_b6j:auto_generated.q[5]
q[6] <= cntr_b6j:auto_generated.q[6]
q[7] <= cntr_b6j:auto_generated.q[7]
cout <= <GND>
eq[0] <= <GND>
eq[1] <= <GND>
eq[2] <= <GND>
eq[3] <= <GND>
eq[4] <= <GND>
eq[5] <= <GND>
eq[6] <= <GND>
eq[7] <= <GND>
eq[8] <= <GND>
eq[9] <= <GND>
eq[10] <= <GND>
eq[11] <= <GND>
eq[12] <= <GND>
eq[13] <= <GND>
eq[14] <= <GND>
eq[15] <= <GND>


|PC_AR|lpm_counter0:inst5|lpm_counter:LPM_COUNTER_component|cntr_b6j:auto_generated
aclr => aclr_actual.IN0
aclr => latch_signal[7].IN0
aclr => latch_signal[6].IN0
aclr => latch_signal[5].IN0
aclr => latch_signal[4].IN0
aclr => latch_signal[3].IN0
aclr => latch_signal[2].IN0
aclr => latch_signal[1].IN0
aclr => latch_signal[0].IN0
aclr => safe_q[7].IN0
aload => mux211_dataout.IN0
aload => _.IN0
aload => mux2111_dataout.IN0
aload => _.IN0
aload => mux2113_dataout.IN0
aload => _.IN0
aload => mux2115_dataout.IN0
aload => _.IN0
aload => mux213_dataout.IN0
aload => _.IN0
aload => mux215_dataout.IN0
aload => _.IN0
aload => mux217_dataout.IN0
aload => _.IN0
aload => mux219_dataout.IN0
aload => _.IN0
aload => aclr_actual.IN1
aload => _.IN0
aload => _.IN0
aload => _.IN0
aload => _.IN0
aload => _.IN0
aload => _.IN0
aload => _.IN0
aload => _.IN0
aload => _.IN0
clock => counter_reg_bit[7].CLK
clock => counter_reg_bit[6].CLK
clock => counter_reg_bit[5].CLK
clock => counter_reg_bit[4].CLK
clock => counter_reg_bit[3].CLK
clock => counter_reg_bit[2].CLK
clock => counter_reg_bit[1].CLK
clock => counter_reg_bit[0].CLK
data[0] => _.IN1
data[0] => _.IN0
data[0] => _.IN1
data[1] => _.IN1
data[1] => _.IN0
data[1] => _.IN1
data[2] => _.IN1
data[2] => _.IN0
data[2] => _.IN1
data[3] => _.IN1
data[3] => _.IN0
data[3] => _.IN1
data[4] => _.IN1
data[4] => _.IN0
data[4] => _.IN1
data[5] => _.IN1
data[5] => _.IN0
data[5] => _.IN1
data[6] => _.IN1
data[6] => _.IN0
data[6] => _.IN1
data[7] => _.IN1
data[7] => _.IN0
data[7] => _.IN1
q[0] <= safe_q[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= safe_q[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= safe_q[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= safe_q[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= safe_q[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= safe_q[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= safe_q[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= safe_q[7].DB_MAX_OUTPUT_PORT_TYPE